input: sensor: remove open/close function from lis3dh driver

This is to make lis3dh accelerometer disabled by default, even if it
is open-ed by user space. Device will have to be explicitely enabled
via sysfs attribute.

Change-Id: I0fb022fac7f05aa7606717c58425fe3ed1c458b0
Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
msm_fb: display: add mdp master port1 bandwidth request

mdp bus traffic go through both mdp port0 and port1, but now mdp
bandwidth request is only for port0.

Change-Id: Ie902de6362cd9225abf6e9c42f260b5af7c3c6f8
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: balance bus bandwidth on mdp axi port0 and port1

mdp read and write clients are connected on both mdp port0 and port1,
however, the bus bandwidth request is made on only port0. This change
divides mdp bw requests to port0 and port1 based on pipe connections
to mdp ports.
ab - no scaling factor - port0 and port1 split
ib - scaling factor - port 0 and port1 split

Change-Id: I9050d1178f634ca908675fa826d08bee09e2a2f3
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: add scaling factor for mdp ab

system profiling found that mdp downscaling needs larger bandwidth
that is related to mdp ab request, so adding scaling factor to mdp ab
calculation reduces the chance of underruns.

ab - scaling factors - port0 and port1 split
ib - 1.5 x ab - no split and same on both ports

Change-Id: I4fde87fce1cd292e317a8261e4700cf98662d09d
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm: display: change mdp default ib_factor to 150

system profiling found that mdp downscaling needs larger bandwidth
that is related to mdp ab request, so adding scaling factor to mdp ab
calculation reduces the chance of underruns.

ab - scaling factors - port0 and port1 split
ib - 1.5 x ab - no split and same on both ports

This is board file change for ib = 1.5 x ab

Change-Id: Ic267c6eb1a92e974e5f94f1a72b95433c73b11ae
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: allow backlight update after first update

bl_updated is set to non zero at pan_display if unset_bl_level
is not zero. And unset_bl_level is not updated unless bl_updated
is zero. There is a situation that bl_updated stay as zero after
first pan display due to unset_bl_level is still zero which
prevents back light from being changed until next pan display
even though unset_bl_level changed. This patch break up this loop
and allow back light being changed right after first pan display.

CRs-fixed: 471983
Change-Id: I75504206853517672f968e8ea8fc6782a282e326
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
mmc: msm_sdcc: Fix SPS-BAM flags while in producer mode

For read operation (writing data into system memory), the
SDCC-BAM producer will update the EOT flags while writing
data done descriptors into pipe memory. It is not necessary
that the s/w should set EOT flag in system consumer mode as
that may confuse hardware.

CRs-Fixed: 468046
Change-Id: I31988fdcfaf6c9fb9c9bfc540837513ea40e125c
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
msm: Fix reservation logic for ADSP heap

We define ADSP heap type as CMA. So, fix the boot time
reservation logic to not to include its size for any
reservation.

CRs-Fixed: 475240
Change-Id: I2ff92892858e83b772b3161d526c36ee9cf44c71
Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
mms_fb: display: init pipe default configure as solidfill

Initialize mdp pipes default config as solid fill so that
there will have no memory fetch if pipe are staged into
mixer while flush bits are left behind and set at next vsync.
This is will prevent mdp iommu page fault from happening
at address 0x00000000 during resume.

Change-Id: Ide944ec1d069629f1ae2ecd0daf49c69ce2af2eb
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
thermal: pm8xxx-tm: Configure temperature alarm for always-on operation

Change the register initialization for the PMIC temperature alarm
module so that it is always on.  This ensures that die
temperature monitoring is active even if CXO is disabled (i.e.
when sleep_b is low).  This is necessary since CXO can be
disabled while the system is still heavily loaded.  Also, using
the alway-on instead of PWM-enabled configuration ensures that
the die temperature can be measured by the PMIC ADC without
reconfiguring the temperature alarm module first.

Change-Id: I4a76c959c81f222fbeca08b6c98b1e4b23653b4e
Signed-off-by: David Collins <collinsd@codeaurora.org>
thermal: pm8xxx-tm: Turn off the temperature alarm during shutdown

The temperature alarm consumes additional current if it remains
turned on when the device is off. Turn off the alarm in the
shutdown hook, as it not required when the device is off.

CRs-Fixed: 474628
Change-Id: Ibfaee6b74aeebcb530ae7375f623955f80df148e
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
msm: msm_bus: Change MDP port interleaved setting

When display driver requests bandwidth on MDP port 0, it was
automatically divided between port 0 and port 1 by the bus driver
as a part of interleaving. Since MDP port 1 was never used,
this did not have any impact.

Now, the display driver needs to use MDP port 1 such that MDP
ports should be able to use the bandwidth non-uniformally.
To enable these ports to use unequal amount of bandwidth,
it is required that bus driver does not divide bandwidth
between port 0 and port 1.
The display team is now responsible for requesting bandwidth
explicitly on both ports.

CRs-Fixed: 474499
Change-Id: I826a4c20a113a32f6d6bcf13f1c6474040f35f46
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
(cherry-pick from Change-Id: I826a4c20a113a32f6d6bcf13f1c6474040f35f46)
msm_fb: hdmi: change sysfs node permissions

Change the write permissions of sysfs nodes from UGO to USR + GRP

Change-Id: Ided5351669eb0f3cdf9ae1a0c1607ef6e76f6852
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
arm: Kconfig: Disable CONFIG_OABI_COMPAT feature on SMP targets

When this option is enabled to support Old ABI, it introduces
a race condition in swap-out code on SMP, such that
instruction is available to the instruction stream (SWI
instruction) but not the data stream.

CPU0		CPU1
clears pte
		executes instruction from page,
		already has I-TLB but no D-TLB entry,
		takes SWI exception
		tries to load instruction, data abort
tlb flush

Therefore, disable this feature on SMP targets.

Change-Id: I4cc4e6924cfcffad391fe2e68d5aa62eee613b0e
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
msm: vidc: Remove kernel mapping on input/output buffers

This change will remove the kernel mapping of input and
output buffers for both video encoder and decoder to
avoid the errors resulting from ion_map_kernel() for
high resolution video concurrency use cases due to the
limited vmalloc space. It also removed the metadata
processing in kerner video driver as kernel virtual
address is removed. The metadata processing can be
done in user space video component.

Change-Id: I3f2c9b7c13b3e09097ce07ca7b59154b97401052
CRs-fixed: 471135
Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
msm: Add support for ION Flushing without virtual address

Video has very large buffers to be flushed. Due to lack of
vmalloc space, ion_map_kernel cannot be called on each of
the video buffers. With this change the ion handle can be
flushed without the need of the kernel mapping.

Change-Id: If026f21e44a2cce6c2b8c232fc80a69d0dabcd14
Signed-off-by: Neeti Desai <neetid@codeaurora.org>

Conflicts:

	drivers/gpu/ion/ion_cp_heap.c
	drivers/gpu/ion/msm/msm_ion.c

Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
msm: mdm2: Add delay between subsequent PS_HOLD for 8064 fusion3

This feature was previously added for the 8960 sglte target,
in commit 21274cf2219899ef9b46cf8b9fd8bf4ce52d057b, but it also
applies to the 8064 sglte2 target. The original commit message
follows.

During SSR first a reset of external modem is issued
and mdm_do_soft_power_on() toggles ap2mdm_soft_reset which
in turn toogles the PS_HOLD. Then a part of SSR external
modem is powered up and mdm_do_soft_power_on() again toggles
the gpio. For PMIC register stabilization we need a 1sec delay
between subsequent mdm_do_soft_power_on().
By default the delay is 500msec, so adding another 500msec for
stablization.

Change-Id: If9138377f521b363801faead6b0fbec22e43eee9
Signed-off-by: Joel King <joelking@codeaurora.org>
msm_fb: display: disable mdp blt mode

The switch of blt mode may cause mdp hang on some targets. To avoid
blt switch, we won't allocate the pipe that requires blt
mode. Basically this implies two things: downscaling is done by
rotator and gpu composition is used in case of blt mode is needed.

This implementation is to calculate mdp clk requirement based on the
req data passed from userspace before setting the actural pipe
data. If overlay_set asks for mdp clk that is greater than
mdp_max_clk, meaning blt is needed, overlay_set returns before pipe
allocation or pipe data change, so this way can avoid mdp to work on
wrong pipe data.

Change-Id: I22e73d08bed920b366c18ee21b132339cf2a0347
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm: 8064: remove flag to prevent soft reset of qsc on first power up

This flag was an optimization because the SOFT_RESET
gpio was initialized HIGH on first bootup of the APQ,
so toggling the soft reset gpio was not necessary if
the pmic on the qsc is still off. However, there is a
corner case where the flag prevents phase 1 SSR from
being collected because in that case, the pmic on the
QSC is actually on. Removing the flag solves the SSR
corner case issue at the expense of removing the
optimization but the performance hit is very small.
Cold boot functionality is not affected.

Change-Id: Ib5399997e7de9f3f5133e238c600dd648f546893
Signed-off-by: Joel King <joelking@codeaurora.org>
Merge "msm: mdm2: Add delay between subsequent PS_HOLD for 8064 fusion3"