Improved front end translations for Neon V{LD,ST}{1,2} instructions,
that do deinterleaving/interleaving via IROps and so generate far
fewer memory references.  As a side effect, fix incorrect ARM back end
implementation of many of the SIMD lane interleaving/deinterleaving
and concatenation IROps.



git-svn-id: svn://svn.valgrind.org/vex/trunk@2708 8f6e269a-dfd6-0310-a8e1-e2731360e62c