Introduce translation_region_read_only to make discriminating against RAM or ROM/BIOS easier with more regions later on.
Make each conditional ARM instruction have its own condition check.
Part 1: Split IWRAM into iwram_data and iwram_smc_data. For now, these areas are simply splits of the old 64 KiB section whose first 32 KiB section was self-modifying code (SMC) detection data.

Stop reading a byte, half-word or word to compare it with a value that is about to be written. Simply write it and let that trigger flushes.

Also, (DSTwo-specific) DMA modification statistics are gone.

The document I'm using to implement the upcoming changes is also committed.
Part 2: Split EWRAM into ewram_data and ewram_smc_data. For now, these areas are simply splits of the old 64 KiB section whose first 32 KiB section was self-modifying code (SMC) detection data.
Reduce the VRAM memory allocation to 96 KiB, since the other half is unneeded.
(ASM) VRAM mirror access changes.
Part 3: Split the BIOS data-and-tag area into bios_data and bios_smc_data. For now, these areas are simply splits of the old data.
Define Partial Flushes over the old code-modification detection metadata. This change breaks Golden Sun 2, because some of its code in RAM can execute as ARM or as Thumb. With only Full Flushes being available, the code could be recompiled immediately in the new mode, but not now.
Aesthetic improvements to the memory area declarations.
Part 4: Implement the split ARM-Thumb metadata and the Currently Code bit. This restores the function of Golden Sun 2.

(DSTwo-specific) This requires a lot of memory, so reduce the number of rewinds by 4. This allows for 1.4 more MiB of metadata and/or code cache, if needed.
Remove a few instructions from DMA writes.
Part 5: Implement and use Code Write Counts to isolate heavily-rewritten code and compile it more quickly.
Revert "Part 5: Implement and use Code Write Counts to isolate heavily-rewritten code and compile it more quickly."

This reverts commit ef684d6754e97e04ed6b0237abab06a14a187c20.
Part 5, take 2: Have Unconditional Branch bits in metadata to tell the Partial Flush operation about the ends of blocks. Split the RAM code cache into IWRAM and EWRAM.

Comment out translation gates in game_config.txt.

(DSTwo-specific) Add statistics on code cache utilisation and flushing.
(DSTwo-specific) Adjust the text for rewinding to reflect the fact that it has been reduced.
Re-enable dead-flag elimination for all code areas.
Merge branch 'memory-access-2'
Add a ROM information interface.