I'm having trouble optimizing memory layout for CPU. My understanding is that just like GPU you want adjacent work items to be accessing adjacent memory so that the compiler can schedule parallel loads. I also understand that modern memory subsystems have some kind of prefetching heuristics too though, so you want to work along cache lines sequentially... Anyway, in other words I thought that a padded Fortran layout would give better performance, but so far I haven't been able to see that.