Correct if-then-else LLVM asm example.

As was present vividly breaks LLVM IR constraints on SSA and basic-blocks:
same var being assigned twice, no control transfer at the end of basic block.
Compare with the original:
http://www.mdevan.org/llvm-py/kaleidoscope/PythonLangImpl5.html
Merge pull request #55 from pfalcon/pfalcon

Correct if-then-else LLVM asm example.