Merging r195827:
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195986 91177308-0d34-0410-b5e6-96231b3b80d8
Merging r195887:
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Merging r195787:
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r195787 | arnolds | 2013-11-26 14:11:23 -0800 (Tue, 26 Nov 2013) | 8 lines

LoopVectorizer: Truncate i64 trip counts of i32 phis if necessary

In signed arithmetic we could end up with an i64 trip count for an i32 phi.
Because it is signed arithmetic we know that this is only defined if the i32
does not wrap. It is therefore safe to truncate the i64 trip count to a i32
value.

Fixes PR18049.
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Merging r195788:
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r195788 | mcrosier | 2013-11-26 14:17:37 -0800 (Tue, 26 Nov 2013) | 2 lines

[AArch64] Add support for NEON scalar floating-point to integer convert
instructions.
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Merging r195803:
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r195803 | mcrosier | 2013-11-26 17:45:58 -0800 (Tue, 26 Nov 2013) | 1 line

[AArch64] Add support for NEON scalar floating-point absolute difference.
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Merging r195812:
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r195812 | silvas | 2013-11-26 20:55:23 -0800 (Tue, 26 Nov 2013) | 3 lines

[docs] Mention gotcha regarding implicit BB numbering

Impetus for the clarification by Mikael Lyngvig.
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Merging r195843:
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r195843 | jiangning | 2013-11-27 06:02:25 -0800 (Wed, 27 Nov 2013) | 2 lines

Fix the AArch64 NEON bug exposed by checking constant integer argument range of ACLE intrinsics.

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Merging r195878:
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r195878 | tstellar | 2013-11-27 13:23:20 -0800 (Wed, 27 Nov 2013) | 3 lines

R600: Add support for ISD::FROUND

NOTE: This is a candidate for the 3.4 branch.
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Merging r195879:
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r195879 | tstellar | 2013-11-27 13:23:29 -0800 (Wed, 27 Nov 2013) | 6 lines

R600/SI: Use SGPR_32 register class for 32-bit SMRD outputs

Writing to the M0 register from an SMRD instruction hangs the GPU, so
we need to use the SGPR_32 register class, which does not include M0.

NOTE: This is a candidate for the 3.4 branch.
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Merging r195881:
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r195881 | tstellar | 2013-11-27 13:23:39 -0800 (Wed, 27 Nov 2013) | 3 lines

R600: Expand vector FABS

NOTE: This is a candidate for the 3.4 branch.
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Merging r195677:
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r195677 | dpeixott | 2013-11-25 11:11:13 -0800 (Mon, 25 Nov 2013) | 41 lines

ARM integrated assembler generates incorrect nop opcode

This patch fixes a bug in the assembler that was causing bad code to
be emitted.  When switching modes in an assembly file (e.g. arm to
thumb mode) we would always emit the opcode from the original mode.

Consider this small example:

$ cat align.s
.code 16
foo:
  add r0, r0
.align 3
  add r0, r0

$ llvm-mc -triple armv7-none-linux align.s -filetype=obj -o t.o
$ llvm-objdump -triple thumbv7 -d t.o
Disassembly of section .text:
foo:
       0:       00 44         add     r0, r0
       2:       00 f0 20 e3   blx #4195904
       6:       00 00         movs    r0, r0
       8:       00 44         add     r0, r0

This shows that we have actually emitted an arm nop (e320f000)
instead of a thumb nop. Unfortunately, this encodes to a thumb
branch which causes bad things to happen when compiling assembly
code with align directives.

The fix is to notify the ARMAsmBackend when we switch mode. The
MCMachOStreamer was already doing this correctly. This patch makes
the same change for the MCElfStreamer.

There is still a bug in the way nops are emitted for alignment
because the MCAlignment fragment does not store the correct mode.
The ARMAsmBackend will emit nops for the last mode it knew about. In
the example above, we still generate an arm nop if we add a `.code
32` to the end of the file.

PR18019

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Merging r195915:
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r195915 | dsanders | 2013-11-28 01:36:44 -0800 (Thu, 28 Nov 2013) | 2 lines

As myself as code-owner of the MIPS backend (lib/Target/Mips/*)

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Merging r195590:
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r195590 | chapuni | 2013-11-24 16:52:46 -0800 (Sun, 24 Nov 2013) | 1 line

SparcFrameLowering.cpp: Prune 'DL' [-Wunused-variable]
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Merging r196004:
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r196004 | void | 2013-11-30 19:36:07 -0800 (Sat, 30 Nov 2013) | 3 lines

Use 'unsigned char' to get this past gcc error message:

  error: invalid conversion from 'unsigned char' to '{anonymous}::Sequence'
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Merging r195844:
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Merging r195903:
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r195903 | haoliu | 2013-11-27 17:07:45 -0800 (Wed, 27 Nov 2013) | 2 lines

AArch64: Fix a bug about disassembling post-index load single element to 4 vectors

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Merging r195905:
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r195905 | jiangning | 2013-11-27 17:34:55 -0800 (Wed, 27 Nov 2013) | 3 lines

Remove the variable only used by assert to avoid the build failure
caused by build options [-Werror,-Wunused-variable].

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Merging r195932:
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r195932 | d0k | 2013-11-28 11:58:56 -0800 (Thu, 28 Nov 2013) | 3 lines

Silence sign-compare warning and reduce nesting.

No functionality change.
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Merging r195936:
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r195936 | kevinqin | 2013-11-28 17:29:16 -0800 (Thu, 28 Nov 2013) | 1 line

[AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.
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Merging r195937:
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