Don't put null/false in the json we pass to the test runner

It doesn't like that. It's going to be fixed to not barf on None, but
this will make things strictly better.

Reviewed By: @ptarjan

Differential Revision: D1100177
Remove a couple 'using namespace' declarations from headers

Reviewed By: @ptarjan

Differential Revision: D1100100
collections: unify collection object data flags

... the flags should all be the same. Fixes an inline issue
where FrozenSet was not marked as having a Clone function,
and *Vector and *Set were not marked as `IsCppBuiltin`.

Reviewed By: @jdelong

Differential Revision: D1100505
Update NEWS file for the "Burrito" release

Reviewed By: @ptarjan

Differential Revision: D1100955
Refactor bytecode emitter support for try/finally

This diff refactors the bytecode emitter support for try/finally. I re-
worked the algorithms to be written in an iterative manner (before they
were recursive) and fixed two small bugs, but aside from that I tried to
preserve the existing algorithms for now and mainly focus on moving the
code around and simplifying the structure a bit.

A lot of the emission logic for supporting try/finally was in separate
classes instead of EmitterVisitor which made things a bit unwieldy. This
diff takes most of the logic from FinallyRouter and FinallyRouterEntry and
moves it to EmitterVisitor, which helped simplify things and better fits
the style of the rest of the emitter. I got rid of the FinallyRouter class
and moved its fields to EmitterVisitor, and I renamed FinallyRouterEntry
and Action to "Region" and "ControlTarget" respectively. I also refactored
things a bit to reduce the amount of code that needs to deal with Regions.
Finally, I fixed a small bug where Region::getCaseCount() was double
counting the number of continue cases, and I improved the emitter to avoid
emitting a jump after the body of a try block when its not needed.

Ideas for future improvements: (1) simplify the algorithms and data
structures, (2) clean up how regions are created, entered, and left,
(3) merge the "Region" abstraction together with other region-like
concepts ("ForeachIterGuard", "FPIRegion", etc).

Reviewed By: @hermanventer

Differential Revision: D1099687
Revisit how we handle post test information

All of our current local cronjob problems (not sure about chronos) are coming from corrupted .stat files. This is because the way we handled the gathering and printing of post test error information and stats were not 100% correct.

This diff hopefully helps fix this such that our local cronjob won't fail any longer.

Reviewed By: @ptarjan

Differential Revision: D1100647
Changing some identifiers to make more sense.

Some trivial cleanup; it's pretty confusing to have a Value
named "state" when there is also a "struct State" in this file.

Reviewed By: @swtaarrs

Differential Revision: D1091303
Fix a typo in Map::differenceByKey()

Thanks to @Alite404Exception for catching this.

Reviewed By: @ptarjan

Differential Revision: D1101336
Stop generating profiling translations after a threshold

This limits the duration of profiling, and skips PGO on functions
that aren't really hot.

Reuses the request count used to control the interpreter warmup
requests.

Reviewed By: @bertmaher

Differential Revision: D1095115
Eliminate a couple linear searches in PGO mode

Instead of walking the entire list of profiling translations, keep
sets keyed on FuncID.

Default to JitRegionSelector=hottrace when JitPGO=true.

Reviewed By: aravind

Differential Revision: D1101198
Change vixl's internal stack pointer constant

This was a little tricky. On ARM machines, register number 31 is the
stack pointer. However, in some encodings, register number 31 refers to
a virtual "zero" register (basically the /dev/zero of registers). To
make sure that you don't accidentally use the wrong one with the wrong
encoding, vixl uses register number 63 to identify the stack pointer
(does not exist in hardware) and converts it to 31 while assembling.

This means that vixl uses 33 different register codes, so I'm changing
PhysReg to reflect this. This means we can now only represent 31 SIMD
register on ARM. I think this is preferable over losing the stack
pointer / zero register distinction in vixl.

Reviewed By: @edwinsmith

Differential Revision: D1100167