PR rtl-optimization/57708
	* recog.c (peep2_find_free_register): Validate all regs in a
	multi-reg mode.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201510 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201515 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-06  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	Backport from trunk r198928,198973,199203,201240,201241,201307.
	2013-05-15  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/19599
	* config/arm/predicates.md (call_insn_operand): New predicate.
	* config/arm/constraints.md ("Cs", "Ss"):  New constraints.
	* config/arm/arm.md (*call_insn, *call_value_insn): Match only
	if insn is not a tail call.
	(*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through
	registers.
	* config/arm/arm.h (enum reg_class): New caller save register class.
	(REG_CLASS_NAMES): Likewise.
	(REG_CLASS_CONTENTS): Likewise.
	* config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling
	without decls.

	2013-05-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/19599
	* config/arm/arm.c (arm_function_ok_for_sibcall): Add check
	for NULL decl.

	2013-05-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/19599
	PR target/57340
	* config/arm/arm.c (any_sibcall_uses_r3): Rename to ..
	(any_sibcall_could_use_r3): this and handle indirect calls.
	(arm_get_frame_offsets): Rename use of any_sibcall_uses_r3.

	2013-07-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/19599
	PR target/57731
	PR target/57748
	* config/arm/arm.md ("*sibcall_value_insn): Replace use of
	Ss with US. Adjust output for v5 and v4t.
	(*sibcall_value_insn): Likewise and loosen predicate on
	operand0.
	* config/arm/constraints.md ("Ss"): Rename to US.

	2013-07-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* config/arm/arm.md (*sibcall_insn): Remove unnecessary space.

	2013-07-29  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	Fix incorrect changelog entry.

	Replace
	PR target/57748
	with
	PR target/57837

	gcc/testsuite/
	Backport from trunk r198928,198973,199203,201240,201241.
	2013-05-15  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/19599
	* gcc.target/arm/pr40887.c: Adjust testcase.
	* gcc.target/arm/pr19599.c: New test.



git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@201527 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-06  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	Backport from trunk r199438,199439,201326.

	2013-05-30  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* config/arm/arm.c (arm_add_cfa_adjust_cfa_note): New added.
	(arm_emit_multi_reg_pop): Add REG_CFA_ADJUST_CFA notes.
	(arm_emit_vfp_multi_reg_pop): Likewise.
	(thumb2_emit_ldrd_pop): Likewise.
	(arm_expand_epilogue): Add misc REG_CFA notes.
	(arm_unwind_emit): Skip REG_CFA_ADJUST_CFA and REG_CFA_RESTORE.

	2013-05-30  Bernd Schmidt  <bernds@codesourcery.com>
	    Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* config/arm/arm-protos.h: Add and update function protos.
	* config/arm/arm.c (use_simple_return_p): New added.
	(thumb2_expand_return): Check simple_return flag.
	* config/arm/arm.md: Add simple_return and conditional simple_return.
	* config/arm/iterators.md: Add iterator for return and simple_return.

	2013-07-30  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	PR rtl-optimization/57637
	* function.c (move_insn_for_shrink_wrap): Also check the
	GEN set of the LIVE problem for the liveness analysis
	if it exists, otherwise give up.

	gcc/testsuite/
	Backport from trunk r199439,199533,201326.

	2013-05-30  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* gcc.dg/shrink-wrap-alloca.c: New added.
	* gcc.dg/shrink-wrap-pretend.c: New added.
	* gcc.dg/shrink-wrap-sibcall.c: New added.

	2013-05-31  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* gcc.dg/shrink-wrap-alloca.c: Use __builtin_alloca.

	2013-07-30  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* gcc.target/arm/pr57637.c: New testcase.



git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@201528 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-06  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	Backport from trunk r198735,198831,199959.
	2013-05-09  Sofiane Naci  <sofiane.naci@arm.com>

	* config/aarch64/aarch64.md: New movtf split.
	(*movtf_aarch64): Update.
	(aarch64_movdi_tilow): Handle TF modes and rename to
	aarch64_movdi_<mode>low.
	(aarch64_movdi_tihigh): Handle TF modes and rename to
	aarch64_movdi_<mode>high
	(aarch64_movtihigh_di): Handle TF modes and rename to
	aarch64_mov<mode>high_di
	(aarch64_movtilow_di): Handle TF modes and rename to
	aarch64_mov<mode>low_di
	(aarch64_movtilow_tilow): Remove spurious whitespace.
	* config/aarch64/aarch64.c (aarch64_split_128bit_move): Handle TFmode
	splits.
	(aarch64_print_operand): Update.

	2013-05-13  Sofiane Naci  <sofiane.naci@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_simd_mov<mode>): Group
	similar switch cases.
	(aarch64_simd_mov): Rename to aarch64_split_simd_mov. Update.
	(aarch64_simd_mov_to_<mode>low): Delete.
	(aarch64_simd_mov_to_<mode>high): Delete.
	(move_lo_quad_<mode>): Add w<-r alternative.
	(aarch64_simd_move_hi_quad_<mode>): Likewise.
	(aarch64_simd_mov_from_*): Update type attribute.
	* config/aarch64/aarch64.c (aarch64_split_simd_move): Refacror switch
	statement.

	2013-06-11  Sofiane Naci  <sofiane.naci@arm.com>

	* config/aarch64/aarch64-simd.md (move_lo_quad_<mode>): Update.

	gcc/testsuite/
	Backport from trunk r198864.
	2013-05-07  Ian Bolton  <ian.bolton@arm.com>

	* gcc.target/aarch64/ands_1.c: New test.
	* gcc.target/aarch64/ands_2.c: Likewise



git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@201529 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-06  Martin Jambor  <mjambor@suse.cz>

	PR middle-end/58041
	* gimple-ssa-strength-reduction.c (replace_ref): Make sure built
	MEM_REF has proper alignment information.

testsuite/
	* gcc.dg/torture/pr58041.c: New test.
	* gcc.target/arm/pr58041.c: Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201530 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-06  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	Backport from trunk r200596,201067,201083.
	2013-07-02  Ian Bolton  <ian.bolton@arm.com>

	* config/aarch64/aarch64-simd.md (absdi2): Support abs for
	DI mode.

	2013-07-19  Ian Bolton  <ian.bolton@arm.com>

	* config/aarch64/arm_neon.h (vabs_s64): New function

	2013-07-20  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/aarch64/aarch64-builtins.c
	(aarch64_fold_builtin): Fold abs in all modes.
	* config/aarch64/aarch64-simd-builtins.def
	(abs): Enable for all modes.
	* config/aarch64/arm_neon.h
	(vabs<q>_s<8,16,32,64): Rewrite using builtins.
	(vabs_f64): Add missing intrinsic.

	gcc/testuite/
	Backport from trunk r200596,201067,201083.
	2013-07-02  Ian Bolton  <ian.bolton@arm.com>

	* gcc.target/aarch64/abs_1.c: New test.

	2013-07-19  Ian Bolton  <ian.bolton@arm.com>

	* gcc.target/aarch64/scalar_intrinsics.c (test_vabs_s64): Added
	new testcase.

	2013-07-20  James Greenhalgh  <james.greenhalgh@arm.com>

	* gcc.target/aarch64/vabs_intrinsic_1.c: New file.



git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@201531 138bc75d-0d04-0410-961f-82ee72b054a4
	* go-gcc.cc (Gcc_backend::immutable_struct_set_init): Use
	compute_reloc_for_constant.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201536 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-06  Martin Jambor  <mjambor@suse.cz>
	    Bernd Edlinger <bernd.edlinger@hotmail.de>

testsuite/
	* gcc.dg/torture/pr58041.c (foo): Accept z by reference.
	(a): Fix constructor.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201539 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201547 138bc75d-0d04-0410-961f-82ee72b054a4
	PR c++/57825
	* tree.c (strip_typedefs) [METHOD_TYPE]: Preserve ref-qualifier.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201551 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-07  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	Backport from trunk r201237.
	2013-07-25  Terry Guo  <terry.guo@arm.com>

	* config/arm/arm.c (thumb1_size_rtx_costs): Assign proper cost for
	shift_add/shift_sub0/shift_sub1 RTXs.

	gcc/testsuite/
	Backport from trunk r201237.
	2013-07-25  Terry Guo  <terry.guo@arm.com>

	* gcc.target/arm/thumb1-Os-mult.c: New test case.



git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@201556 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-07  Paolo Carlini  <paolo.carlini@oracle.com>

	PR libstdc++/58098
	* include/bits/random.h (cauchy_distribution<>::min,
	extreme_value_distribution<>::min, normal_distribution<>::min,
	student_t_distribution<>::min): Fix.
	* include/ext/random (normal_mv_distribution<>::min): Likewise.
	* testsuite/26_numerics/random/cauchy_distribution/cons/parms.cc:
	Adjust.
	testsuite/26_numerics/random/cauchy_distribution/cons/default.cc:
	Likewise.
	* testsuite/26_numerics/random/extreme_value_distribution/cons/
	parms.cc: Likewise.
	testsuite/26_numerics/random/extreme_value_distribution/cons/
	default.cc: Likewise.
	* testsuite/26_numerics/random/normal_distribution/cons/parms.cc:
	Likewise.
	* testsuite/26_numerics/random/normal_distribution/cons/default.cc:
	Likewise.
	* testsuite/26_numerics/random/student_t_distribution/cons/parms.cc:
	Likewise.
	* testsuite/26_numerics/random/student_t_distribution/cons/default.cc:
	Likewise.
	* testsuite/ext/random/normal_mv_distribution/cons/parms.cc: Likewise.
	* testsuite/ext/random/normal_mv_distribution/cons/default.cc: Likewise.

	* testsuite/26_numerics/random/exponential_distribution/cons/parms.cc:
	Minor tweak.
	* testsuite/26_numerics/random/exponential_distribution/cons/default.cc:
	Likewise.

	* testsuite/ext/von_mises_distribution/*: Move to...
	* testsuite/ext/random/von_mises_distribution/*: ... here.
	* testsuite/ext/triangular_distribution/*: Move to...
	* testsuite/ext/random/triangular_distribution/*: ... here.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201563 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-07  Paolo Carlini  <paolo.carlini@oracle.com>

	PR libstdc++/58098
	* include/bits/random.h (cauchy_distribution<>::min,
	extreme_value_distribution<>::min, normal_distribution<>::min,
	student_t_distribution<>::min): Fix.
	* include/ext/random (normal_mv_distribution<>::min): Likewise.
	* testsuite/26_numerics/random/cauchy_distribution/cons/parms.cc:
	Adjust.
	testsuite/26_numerics/random/cauchy_distribution/cons/default.cc:
	Likewise.
	* testsuite/26_numerics/random/extreme_value_distribution/cons/
	parms.cc: Likewise.
	testsuite/26_numerics/random/extreme_value_distribution/cons/
	default.cc: Likewise.
	* testsuite/26_numerics/random/normal_distribution/cons/parms.cc:
	Likewise.
	* testsuite/26_numerics/random/normal_distribution/cons/default.cc:
	Likewise.
	* testsuite/26_numerics/random/student_t_distribution/cons/parms.cc:
	Likewise.
	* testsuite/26_numerics/random/student_t_distribution/cons/default.cc:
	Likewise.
	* testsuite/ext/random/normal_mv_distribution/cons/parms.cc: Likewise.
	* testsuite/ext/random/normal_mv_distribution/cons/default.cc: Likewise.

	* testsuite/26_numerics/random/exponential_distribution/cons/parms.cc:
	Minor tweak.
	* testsuite/26_numerics/random/exponential_distribution/cons/default.cc:
	Likewise.

	* testsuite/ext/von_mises_distribution/*: Move to...
	* testsuite/ext/random/von_mises_distribution/*: ... here.
	* testsuite/ext/triangular_distribution/*: Move to...
	* testsuite/ext/random/triangular_distribution/*: ... here.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201564 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-07  Paolo Carlini  <paolo.carlini@oracle.com>

	* include/ext/atomicity.h: Add #pragma GCC system_header.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201568 138bc75d-0d04-0410-961f-82ee72b054a4
compiler: Fix "missing return" error for case T1, T2 in type switches.

Also change the "missing return" text and report it at the end
of the function, rather than the start, to match the gc
compiler.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201578 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201587 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-05  Christophe Lyon  <christophe.lyon@linaro.org>

	Backport from trunk
	r198489,200167,200199,200510,200513,200515,200576.
	2013-05-01  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/thumb2.md (thumb2_smaxsi3,thumb2_sminsi3): Convert
	define_insn to define_insn_and_split.
	(thumb32_umaxsi3,thumb2_uminsi3): Likewise.
	(thumb2_negdi2,thumb2_abssi2,thumb2_neg_abssi2): Likewise.
	(thumb2_mov_scc,thumb2_mov_negscc,thumb2_mov_notscc): Likewise.
	(thumb2_movsicc_insn,thumb2_and_scc,thumb2_ior_scc): Likewise.
	(thumb2_negscc): Likewise.

	2013-06-18  Sofiane Naci  <sofiane.naci@arm.com>

	* config/arm/arm.md (attribute "insn"): Move multiplication and division
	attributes to...
	(attribute "type"): ... here.  Remove mult.
	(attribute "mul32"): New attribute.
	(attribute "mul64"): Add umaal.
	(*arm_mulsi3): Update attributes.
	(*arm_mulsi3_v6): Likewise.
	(*thumb_mulsi3): Likewise.
	(*thumb_mulsi3_v6): Likewise.
	(*mulsi3_compare0): Likewise.
	(*mulsi3_compare0_v6): Likewise.
	(*mulsi_compare0_scratch): Likewise.
	(*mulsi_compare0_scratch_v6): Likewise.
	(*mulsi3addsi): Likewise.
	(*mulsi3addsi_v6): Likewise.
	(*mulsi3addsi_compare0): Likewise.
	(*mulsi3addsi_compare0_v6): Likewise.
	(*mulsi3addsi_compare0_scratch): Likewise.
	(*mulsi3addsi_compare0_scratch_v6): Likewise.
	(*mulsi3subsi): Likewise.
	(*mulsidi3adddi): Likewise.
	(*mulsi3addsi_v6): Likewise.
	(*mulsidi3adddi_v6): Likewise.
	(*mulsidi3_nov6): Likewise.
	(*mulsidi3_v6): Likewise.
	(*umulsidi3_nov6): Likewise.
	(*umulsidi3_v6): Likewise.
	(*umulsidi3adddi): Likewise.
	(*umulsidi3adddi_v6): Likewise.
	(*smulsi3_highpart_nov6): Likewise.
	(*smulsi3_highpart_v6): Likewise.
	(*umulsi3_highpart_nov6): Likewise.
	(*umulsi3_highpart_v6): Likewise.
	(mulhisi3): Likewise.
	(*mulhisi3tb): Likewise.
	(*mulhisi3bt): Likewise.
	(*mulhisi3tt): Likewise.
	(maddhisi4): Likewise.
	(*maddhisi4tb): Likewise.
	(*maddhisi4tt): Likewise.
	(maddhidi4): Likewise.
	(*maddhidi4tb): Likewise.
	(*maddhidi4tt): Likewise.
	(divsi3): Likewise.
	(udivsi3): Likewise.
	* config/arm/thumb2.md (thumb2_mulsi_short): Update attributes.
	(thumb2_mulsi_short_compare0): Likewise.
	(thumb2_mulsi_short_compare0_scratch): Likewise.
	* config/arm/arm1020e.md (1020mult1): Update attribute change.
	(1020mult2): Likewise.
	(1020mult3): Likewise.
	(1020mult4): Likewise.
	(1020mult5): Likewise.
	(1020mult6): Likewise.
	* config/arm/cortex-a15.md (cortex_a15_mult32): Update attribute change.
	(cortex_a15_mult64): Likewise.
	(cortex_a15_sdiv): Likewise.
	(cortex_a15_udiv): Likewise.
	* config/arm/arm1026ejs.md (mult1): Update attribute change.
	(mult2): Likewise.
	(mult3): Likewise.
	(mult4): Likewise.
	(mult5): Likewise.
	(mult6): Likewise.
	* config/arm/marvell-pj4.md (pj4_ir_mul): Update attribute change.
	(pj4_ir_div): Likewise.
	* config/arm/arm1136jfs.md (11_mult1): Update attribute change.
	(11_mult2): Likewise.
	(11_mult3): Likewise.
	(11_mult4): Likewise.
	(11_mult5): Likewise.
	(11_mult6): Likewise.
	(11_mult7): Likewise.
	* config/arm/cortex-a8.md (cortex_a8_mul): Update attribute change.
	(cortex_a8_mla): Likewise.
	(cortex_a8_mull): Likewise.
	(cortex_a8_smulwy): Likewise.
	(cortex_a8_smlald): Likewise.
	* config/arm/cortex-m4.md (cortex_m4_alu): Update attribute change.
	* config/arm/cortex-r4.md (cortex_r4_mul_4): Update attribute change.
	(cortex_r4_mul_3): Likewise.
	(cortex_r4_mla_4): Likewise.
	(cortex_r4_mla_3): Likewise.
	(cortex_r4_smlald): Likewise.
	(cortex_r4_mull): Likewise.
	(cortex_r4_sdiv): Likewise.
	(cortex_r4_udiv): Likewise.
	* config/arm/cortex-a7.md (cortex_a7_mul): Update attribute change.
	(cortex_a7_idiv): Likewise.
	* config/arm/arm926ejs.md (9_mult1): Update attribute change.
	(9_mult2): Likewise.
	(9_mult3): Likewise.
	(9_mult4): Likewise.
	(9_mult5): Likewise.
	(9_mult6): Likewise.
	* config/arm/cortex-a53.md (cortex_a53_mul): Update attribute change.
	(cortex_a53_sdiv): Likewise.
	(cortex_a53_udiv): Likewise.
	* config/arm/fa726te.md (726te_mult_op): Update attribute change.
	* config/arm/fmp626.md (mp626_mult1): Update attribute change.
	(mp626_mult2): Likewise.
	(mp626_mult3): Likewise.
	(mp626_mult4): Likewise.
	* config/arm/fa526.md (526_mult1): Update attribute change.
	(526_mult2): Likewise.
	* config/arm/arm-generic.md (mult): Update attribute change.
	(mult_ldsched_strongarm): Likewise.
	(mult_ldsched): Likewise.
	(multi_cycle): Likewise.
	* config/arm/cortex-a5.md (cortex_a5_mul): Update attribute change.
	* config/arm/fa606te.md (606te_mult1): Update attribute change.
	(606te_mult2): Likewise.
	(606te_mult3): Likewise.
	(606te_mult4): Likewise.
	* config/arm/cortex-a9.md (cortex_a9_mult16): Update attribute change.
	(cortex_a9_mac16): Likewise.
	(cortex_a9_multiply): Likewise.
	(cortex_a9_mac): Likewise.
	(cortex_a9_multiply_long): Likewise.
	* config/arm/fa626te.md (626te_mult1): Update attribute change.
	(626te_mult2): Likewise.
	(626te_mult3): Likewise.
	(626te_mult4): Likewise.

	2013-06-19  Sofiane Naci  <sofiane.naci@arm.com>

	* config/arm/vfp.md: Move VFP instruction classification documentation
	to ...
	* config/arm/arm.md: ... here.  Update instruction classification
	documentation.

	2013-06-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/predicates.md (arm_cond_move_operator): New predicate.
	* config/arm/arm.md (movsfcc): Use arm_cond_move_operator predicate.
	(movdfcc): Likewise.
	* config/arm/vfp.md (*thumb2_movsf_vfp):
	Disable predication for arm_restrict_it.
	(*thumb2_movsfcc_vfp): Disable for arm_restrict_it.
	(*thumb2_movdfcc_vfp): Likewise.
	(*abssf2_vfp, *absdf2_vfp, *negsf2_vfp, *negdf2_vfp,*addsf3_vfp,
	*adddf3_vfp, *subsf3_vfp, *subdf3_vfpc, *divsf3_vfp,*divdf3_vfp,
	*mulsf3_vfp, *muldf3_vfp, *mulsf3negsf_vfp, *muldf3negdf_vfp,
	*mulsf3addsf_vfp, *muldf3adddf_vfp, *mulsf3subsf_vfp,
	*muldf3subdf_vfp, *mulsf3negsfaddsf_vfp, *fmuldf3negdfadddf_vfp,
	*mulsf3negsfsubsf_vfp, *muldf3negdfsubdf_vfp, *fma<SDF:mode>4,
	*fmsub<SDF:mode>4, *fnmsub<SDF:mode>4, *fnmadd<SDF:mode>4,
	*extendsfdf2_vfp, *truncdfsf2_vfp, *extendhfsf2, *truncsfhf2,
	*truncsisf2_vfp, *truncsidf2_vfp, fixuns_truncsfsi2, fixuns_truncdfsi2,
	*floatsisf2_vfp, *floatsidf2_vfp, floatunssisf2, floatunssidf2,
	*sqrtsf2_vfp, *sqrtdf2_vfp, *cmpsf_vfp, *cmpsf_trap_vfp, *cmpdf_vfp,
	*cmpdf_trap_vfp, <vrint_pattern><SDF:mode>2):
	Disable predication for arm_restrict_it.

	2013-06-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/arm.md (arm_mulsi3_v6): Add alternative for 16-bit
	encoding.
	(mulsi3addsi_v6): Disable predicable variant for arm_restrict_it.
	(mulsi3subsi): Likewise.
	(mulsidi3adddi): Likewise.
	(mulsidi3_v6): Likewise.
	(umulsidi3_v6): Likewise.
	(umulsidi3adddi_v6): Likewise.
	(smulsi3_highpart_v6): Likewise.
	(umulsi3_highpart_v6): Likewise.
	(mulhisi3tb): Likewise.
	(mulhisi3bt): Likewise.
	(mulhisi3tt): Likewise.
	(maddhisi4): Likewise.
	(maddhisi4tb): Likewise.
	(maddhisi4tt): Likewise.
	(maddhidi4): Likewise.
	(maddhidi4tb): Likewise.
	(maddhidi4tt): Likewise.
	(zeroextractsi_compare0_scratch): Likewise.
	(insv_zero): Likewise.
	(insv_t2): Likewise.
	(anddi_notzesidi_di): Likewise.
	(anddi_notsesidi_di): Likewise.
	(andsi_notsi_si): Likewise.
	(iordi_zesidi_di): Likewise.
	(xordi_zesidi_di): Likewise.
	(andsi_iorsi3_notsi): Likewise.
	(smax_0): Likewise.
	(smax_m1): Likewise.
	(smin_0): Likewise.
	(not_shiftsi): Likewise.
	(unaligned_loadsi): Likewise.
	(unaligned_loadhis): Likewise.
	(unaligned_loadhiu): Likewise.
	(unaligned_storesi): Likewise.
	(unaligned_storehi): Likewise.
	(extv_reg): Likewise.
	(extzv_t2): Likewise.
	(divsi3): Likewise.
	(udivsi3): Likewise.
	(arm_zero_extendhisi2addsi): Likewise.
	(arm_zero_extendqisi2addsi): Likewise.
	(compareqi_eq0): Likewise.
	(arm_extendhisi2_v6): Likewise.
	(arm_extendqisi2addsi): Likewise.
	(arm_movt): Likewise.
	(thumb2_ldrd): Likewise.
	(thumb2_ldrd_base): Likewise.
	(thumb2_ldrd_base_neg): Likewise.
	(thumb2_strd): Likewise.
	(thumb2_strd_base): Likewise.
	(thumb2_strd_base_neg): Likewise.
	(arm_negsi2): Add alternative for 16-bit encoding.
	(arm_one_cmplsi2): Likewise.

	2013-06-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/constraints.md (Ts): New constraint.
	* config/arm/arm.md (arm_movqi_insn): Add alternatives for
	16-bit encodings.
	(compare_scc): Use "Ts" constraint for operand 0.
	(ior_scc_scc): Likewise.
	(and_scc_scc): Likewise.
	(and_scc_scc_nodom): Likewise.
	(ior_scc_scc_cmp): Likewise for operand 7.
	(and_scc_scc_cmp): Likewise.
	* config/arm/thumb2.md (thumb2_movsi_insn):
	Add alternatives for 16-bit encodings.
	(thumb2_movhi_insn): Likewise.
	(thumb2_movsicc_insn): Likewise.
	(thumb2_and_scc): Take 'and' outside cond_exec.  Use "Ts" constraint.
	(thumb2_negscc): Use "Ts" constraint.
	Move mvn instruction outside cond_exec block.
	* config/arm/vfp.md (thumb2_movsi_vfp): Add alternatives
	for 16-bit encodings.

	2013-07-01  Sofiane Naci  <sofiane.naci@arm.com>

	* arm.md (attribute "wtype"): Delete.  Move attribute values from here
	to ...
	(attribute "type"): ... here, and prefix with "wmmx_".
	(attribute "core_cycles"): Update for attribute changes.
	* iwmmxt.md (tbcstv8qi): Update for attribute changes.
	(tbcstv4hi): Likewise.
	(tbcstv2si): Likewise.
	(iwmmxt_iordi3): Likewise.
	(iwmmxt_xordi3): Likewise.
	(iwmmxt_anddi3): Likewise.
	(iwmmxt_nanddi3): Likewise.
	(iwmmxt_arm_movdi): Likewise.
	(iwmmxt_movsi_insn): Likewise.
	(mov<mode>_internal): Likewise.
	(and<mode>3_iwmmxt): Likewise.
	(ior<mode>3_iwmmxt): Likewise.
	(xor<mode>3_iwmmxt): Likewise.
	(add<mode>3_iwmmxt): Likewise.
	(ssaddv8qi3): Likewise.
	(ssaddv4hi3): Likewise.
	(ssaddv2si3): Likewise.
	(usaddv8qi3): Likewise.
	(usaddv4hi3): Likewise.
	(usaddv2si3): Likewise.
	(sub<mode>3_iwmmxt): Likewise.
	(sssubv8qi3): Likewise.
	(sssubv4hi3): Likewise.
	(sssubv2si3): Likewise.
	(ussubv8qi3): Likewise.
	(ussubv4hi3): Likewise.
	(ussubv2si3): Likewise.
	(mulv4hi3_iwmmxt): Likewise.
	(smulv4hi3_highpart): Likewise.
	(umulv4hi3_highpart): Likewise.
	(iwmmxt_wmacs): Likewise.
	(iwmmxt_wmacsz): Likewise.
	(iwmmxt_wmacu): Likewise.
	(iwmmxt_wmacuz): Likewise.
	(iwmmxt_clrdi): Likewise.
	(iwmmxt_clrv8qi): Likewise.
	(iwmmxt_clr4hi): Likewise.
	(iwmmxt_clr2si): Likewise.
	(iwmmxt_uavgrndv8qi3): Likewise.
	(iwmmxt_uavgrndv4hi3): Likewise.
	(iwmmxt_uavgv8qi3): Likewise.
	(iwmmxt_uavgv4hi3): Likewise.
	(iwmmxt_tinsrb): Likewise.
	(iwmmxt_tinsrh): Likewise.
	(iwmmxt_tinsrw): Likewise.
	(iwmmxt_textrmub): Likewise.
	(iwmmxt_textrmsb): Likewise.
	(iwmmxt_textrmuh): Likewise.
	(iwmmxt_textrmsh): Likewise.
	(iwmmxt_textrmw): Likewise.
	(iwmxxt_wshufh): Likewise.
	(eqv8qi3): Likewise.
	(eqv4hi3): Likewise.
	(eqv2si3): Likewise.
	(gtuv8qi3): Likewise.
	(gtuv4hi3): Likewise.
	(gtuv2si3): Likewise.
	(gtv8qi3): Likewise.
	(gtv4hi3): Likewise.
	(gtv2si3): Likewise.
	(smax<mode>3_iwmmxt): Likewise.
	(umax<mode>3_iwmmxt): Likewise.
	(smin<mode>3_iwmmxt): Likewise.
	(umin<mode>3_iwmmxt): Likewise.
	(iwmmxt_wpackhss): Likewise.
	(iwmmxt_wpackwss): Likewise.
	(iwmmxt_wpackdss): Likewise.
	(iwmmxt_wpackhus): Likewise.
	(iwmmxt_wpackwus): Likewise.
	(iwmmxt_wpackdus): Likewise.
	(iwmmxt_wunpckihb): Likewise.
	(iwmmxt_wunpckihh): Likewise.
	(iwmmxt_wunpckihw): Likewise.
	(iwmmxt_wunpckilb): Likewise.
	(iwmmxt_wunpckilh): Likewise.
	(iwmmxt_wunpckilw): Likewise.
	(iwmmxt_wunpckehub): Likewise.
	(iwmmxt_wunpckehuh): Likewise.
	(iwmmxt_wunpckehuw): Likewise.
	(iwmmxt_wunpckehsb): Likewise.
	(iwmmxt_wunpckehsh): Likewise.
	(iwmmxt_wunpckehsw): Likewise.
	(iwmmxt_wunpckelub): Likewise.
	(iwmmxt_wunpckeluh): Likewise.
	(iwmmxt_wunpckeluw): Likewise.
	(iwmmxt_wunpckelsb): Likewise.
	(iwmmxt_wunpckelsh): Likewise.
	(iwmmxt_wunpckelsw): Likewise.
	(ror<mode>3): Likewise.
	(ashr<mode>3_iwmmxt): Likewise.
	(lshr<mode>3_iwmmxt): Likewise.
	(ashl<mode>3_iwmmxt): Likewise.
	(ror<mode>3_di): Likewise.
	(ashr<mode>3_di): Likewise.
	(lshr<mode>3_di): Likewise.
	(ashl<mode>3_di): Likewise.
	(iwmmxt_wmadds): Likewise.
	(iwmmxt_wmaddu): Likewise.
	(iwmmxt_tmia): Likewise.
	(iwmmxt_tmiaph): Likewise.
	(iwmmxt_tmiabb): Likewise.
	(iwmmxt_tmiatb): Likewise.
	(iwmmxt_tmiabt): Likewise.
	(iwmmxt_tmiatt): Likewise.
	(iwmmxt_tmovmskb): Likewise.
	(iwmmxt_tmovmskh): Likewise.
	(iwmmxt_tmovmskw): Likewise.
	(iwmmxt_waccb): Likewise.
	(iwmmxt_wacch): Likewise.
	(iwmmxt_waccw): Likewise.
	(iwmmxt_waligni): Likewise.
	(iwmmxt_walignr): Likewise.
	(iwmmxt_walignr0): Likewise.
	(iwmmxt_walignr1): Likewise.
	(iwmmxt_walignr2): Likewise.
	(iwmmxt_walignr3): Likewise.
	(iwmmxt_wsadb): Likewise.
	(iwmmxt_wsadh): Likewise.
	(iwmmxt_wsadbz): Likewise.
	(iwmmxt_wsadhz): Likewise.
	* iwmmxt2.md (iwmmxt_wabs<mode>3): Update for attribute changes.
	(iwmmxt_wabsdiffb): Likewise.
	(iwmmxt_wabsdiffh): Likewise.
	(iwmmxt_wabsdiffw): Likewise.
	(iwmmxt_waddsubhx): Likewise
	(iwmmxt_wsubaddhx): Likewise.
	(addc<mode>3): Likewise.
	(iwmmxt_avg4): Likewise.
	(iwmmxt_avg4r): Likewise.
	(iwmmxt_wmaddsx): Likewise.
	(iwmmxt_wmaddux): Likewise.
	(iwmmxt_wmaddsn): Likewise.
	(iwmmxt_wmaddun): Likewise.
	(iwmmxt_wmulwsm): Likewise.
	(iwmmxt_wmulwum): Likewise.
	(iwmmxt_wmulsmr): Likewise.
	(iwmmxt_wmulumr): Likewise.
	(iwmmxt_wmulwsmr): Likewise.
	(iwmmxt_wmulwumr): Likewise.
	(iwmmxt_wmulwl): Likewise.
	(iwmmxt_wqmulm): Likewise.
	(iwmmxt_wqmulwm): Likewise.
	(iwmmxt_wqmulmr): Likewise.
	(iwmmxt_wqmulwmr): Likewise.
	(iwmmxt_waddbhusm): Likewise.
	(iwmmxt_waddbhusl): Likewise.
	(iwmmxt_wqmiabb): Likewise.
	(iwmmxt_wqmiabt): Likewise.
	(iwmmxt_wqmiatb): Likewise.
	(iwmmxt_wqmiatt): Likewise.
	(iwmmxt_wqmiabbn): Likewise.
	(iwmmxt_wqmiabtn): Likewise.
	(iwmmxt_wqmiatbn): Likewise.
	(iwmmxt_wqmiattn): Likewise.
	(iwmmxt_wmiabb): Likewise.
	(iwmmxt_wmiabt): Likewise.
	(iwmmxt_wmiatb): Likewise.
	(iwmmxt_wmiatt): Likewise.
	(iwmmxt_wmiabbn): Likewise.
	(iwmmxt_wmiabtn): Likewise.
	(iwmmxt_wmiatbn): Likewise.
	(iwmmxt_wmiattn): Likewise.
	(iwmmxt_wmiawbb): Likewise.
	(iwmmxt_wmiawbt): Likewise.
	(iwmmxt_wmiawtb): Likewise.
	(iwmmxt_wmiawtt): Likewise.
	(iwmmxt_wmiawbbn): Likewise.
	(iwmmxt_wmiawbtn): Likewise.
	(iwmmxt_wmiawtbn): Likewise.
	(iwmmxt_wmiawttn): Likewise.
	(iwmmxt_wmerge): Likewise.
	(iwmmxt_tandc<mode>3): Likewise.
	(iwmmxt_torc<mode>3): Likewise.
	(iwmmxt_torvsc<mode>3): Likewise.
	(iwmmxt_textrc<mode>3): Likewise.
	* marvell-f-iwmmxt.md (wmmxt_shift): Update for attribute changes.
	(wmmxt_pack): Likewise.
	(wmmxt_mult_c1): Likewise.
	(wmmxt_mult_c2): Likewise.
	(wmmxt_alu_c1): Likewise.
	(wmmxt_alu_c2): Likewise.
	(wmmxt_alu_c3): Likewise.
	(wmmxt_transfer_c1): Likewise.
	(wmmxt_transfer_c2): Likewise.
	(wmmxt_transfer_c3): Likewise.
	(marvell_f_iwmmxt_wstr): Likewise.
	(marvell_f_iwmmxt_wldr): Likewise.




git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@201590 138bc75d-0d04-0410-961f-82ee72b054a4
Fix ChangeLog.linaro entry date

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@201594 138bc75d-0d04-0410-961f-82ee72b054a4
2013-08-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	Backport from mainline:
	2013-08-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon.md (movmisalign<mode>): Disable when we
	don't allow unaligned accesses.
	(*movmisalign<mode>_neon_store): Likewise.
	(*movmisalign<mode>_neon_load): Likewise.
	(*movmisalign<mode>_neon_store): Likewise.
	(*movmisalign<mode>_neon_load): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@201605 138bc75d-0d04-0410-961f-82ee72b054a4