updated quartus version requirement
updated documentation, more detail on Virtex 5 and Digilent Genesys
Merge branch 'master' of github.ugent.be:UGent-HES/tlut_flow

Conflicts:
	documentation/src/user_guide.tex
	documentation/user_guide.pdf
small changes to user guide
Merge branch 'master' of github.ugent.be:UGent-HES/tlut_flow

Conflicts:
	documentation/user_guide.pdf
Improved --PARAM parsing
Tool flow on XCV5LX110T
Updated flow for the XUPv5 board
virtex5 test script cleanup
Tool flow for XC5VLX50T (Genesys)
Update to the genesys board, replaced hard references in subdir.mk
Update of tutorial (support for XC5VLX110T)
Merge branch 'master' of github.ugent.be:UGent-HES/tlut_flow
Small correction to the user guide.
Merge branch 'master' of github.ugent.be:UGent-HES/tlut_flow
Housekeeping 	- changes to tmapXilinx.py (added  --NOTMAP support)
		- MappingAIG now copies the architecture name from the original VHDL file, no more default rtl architecture
Update to the userguide
ignore backup (~) .vhd files
user guide pdf updated