fb: JZ4770: Fixed resetting of interrupt state bits

Previously, if multiple bits were set, only the last one was reset.
fb: JZ4770: Make the frame buffer pages cacheable (write through)

This roughly doubles the performance of a test program that does
nothing other than writing pixels with a simple test pattern.

Because of the write through setting, pixels will end up in physical
memory immediately, so there is no risk of old data being read by the
DMA transfer to the LCDC.
fb: JZ4770: Make the frame buffer pages fully cacheable

This yields a 50% performance increase for a test program that does
nothing other than writing pixels with a simple test pattern.

To ensure pixels end up in memory to be DMA-ed, cache flushes must be
forced. This is done either at start of frame (single buffering) or on
panning (double buffering). A simple heuristic is used to figure out
whether we're running single or double buffered (see delay_flush).