APPLIED: ARM: tegra: fix DEBUG_LL combined with LPAE

The DEBUG_LL UART address is mapped as an MMU section, hence, the
virtual address must be section-aligned. Sections are 1MB without LPAE
and 2MB with LPAE. Tegra's virtual address was only aligned to 1MB, and
hence the mapping was set up incorrectly with LPAE enabled, thus causing
a hang early during boot. Fix this by picking a different virtual address
that is aligned to 2MB.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
APPLIED: ARM: tegra: don't hard-code DEBUG_LL baud rate

Stop writing to the UART clock divider registers in the Tegra DEBUG_LL
code. This allows the DEBUG_LL output to use whatever baud rate was set
up by the bootloader. Some users are using higher rates than 115200.

This removes the only usage of tegra_uart_config[3], so reduce the size
allocated for that array.

Finally, fix busyuart() so that it only waits for THRE and not TEMT. For
some reason, TEMT doesn't get asserted (at least on Tegra30 Beaver) at
9600 baud, even though it does at 115200 baud. This sounds like a HW bug,
but I haven't investigated. For reference, U-Boot's serial code has
always only checked THRE, and not checked TEMT.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Paul Walmsley <pwalmsley@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
APPLIED: ARM: tegra: use section-sized static mappings for LPAE too

The static mappings for Tegra's PPSB and APB regions were sized at 1MB
in order to allow mapping via sections in order to avoid burning RAM for
PTEs. On LPAE, sections are 2MB, so the static mappings need to be
larger in order to gain the same benefit. Set IO_{PPSB,APB}_SIZE to
SECTION_SIZE so this adjusts automatically.

While we're fiddling with iomap.h, compress IO_{IRAM,CPU}_VIRT together
to save virtual address space in the vmalloc region; these two regions
are mapped using PTEs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
APPLIED: ASoC: add DT binding document for MAX98090 CODEC

This binding mainly serves to document the list of input and output pins
that may be used in a sound card's audio routing table.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
APPLIED: ASoC: tegra: add tegra+MAX98090 machine driver

Initially, this binding and driver only describe/support playback to
headphones and speakers, and capture from the external microphone, with
GPIO-based jack detection for the headphone jack only.

This driver is useful for the Venice2 board.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ASoC: restructure dmaengine_pcm_request_chan_of()

Restructure the internals of dmaengine_pcm_request_chan_of() as a loop
over all channels to be allocated. This makes it easier to add logic
that applies to all allocated channels, without having to duplicate that
logic in each of the half-duplex/full-duplex paths.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2 (new as a separate patch):
* Re-ordered patches, so that patch 3/3 in this series could be available
  in the ASoC tree without having to wait for the patches to the DMA tree
  that implement deferred probe during channel allocation.

This whole series is a dependency for some patches that will go through
the Tegra tree. If it could be applied to a topic branch in the ASoC tree
that would be great. the overall dependency structure will be:

a) This series.
   Can be applied on top of e.g. v3.13-rc1.
b) Patches to the DMA tree, which implement deferred probe.
   Can be applied on top of e.g. v3.13-rc1.
c) ASoC modifications to support deferred probe during DMA ch allocation
   This will depend on both (a) and (b).
d) Tegra modifications that depend on (c).
ASoC: don't leak on error in snd_dmaengine_pcm_register

If snd_dmaengine_pcm_register()'s call to snd_soc_add_platform() fails,
all objects allocated during registration are leaked. Fix this by adding
error-handling code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2 (new as a separate patch):
* Re-ordered patches, so that patch 3/3 in this series could be available
  in the ASoC tree without having to wait for the patches to the DMA tree
  the implement deferred probe during channel allocation.
ASoC: dmaengine: add custom DMA config to snd_dmaengine_pcm_config

Add fields to struct snd_dmaengine_pcm_config to allow custom:

- DMA channel names.

  This is useful when the default "tx" and "rx" channel names don't
  apply, for example if a HW module supports multiple channels, each
  having different DMA channel names. This is the case with the FIFOs
  in Tegra's AHUB. This new facility can replace
  SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME.

- DMA device

  This allows requesting DMA channels for a device other than the device
  which is registering the "PCM" driver. This is quite unusual, but is
  currently useful on Tegra. In much HW, and in Tegra20, each DAI HW
  module contains its own FIFOs which DMA writes to. However, in Tegra30,
  the DMA FIFOs were split out AHUB HW module, which then routes the data
  through a cross-bar, and into the DAI HW modules. However, the current
  ASoC driver structure does not expose this detail, and acts as if the
  FIFOs are still part of the DAI HW modules. Consequently, the "PCM"
  driver is registered with the DAI HW module, yet the DMA channels must
  be looked up in the AHUB HW module's device tree node. This new config
  field allows that to happen. Eventually, the Tegra drivers will be
  reworked to fully expose the AHUB, and this config field can be
  removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
---
v2:
* Re-ordered patches, so that patch 3/3 in this series could be available
  in the ASoC tree without having to wait for the patches to the DMA tree
  the implement deferred probe during channel allocation.
* dev_warn() in dmaengine_pcm_request_chan_of() if config->dev is set;
  drivers generally shouldn't need this feature, and should be re-
  structured if they do.
ASoC: dmaengine: remove SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME

struct snd_dmaengine_pcm_config's new chan_names field implements the
same feature, and nothing uses SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME,
so remove it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
dma: add channel request API that supports deferred probe

dma_request_slave_channel() simply returns NULL whenever DMA channel
lookup fails. Lookup could fail for two distinct reasons:

a) No DMA specification exists for the channel name.
   This includes situations where no DMA specifications exist at all, or
   other general lookup problems.

b) A DMA specification does exist, yet the driver for that channel is not
   yet registered.

Case (b) should trigger deferred probe in client drivers. However, since
they have no way to differentiate the two situations, it cannot.

Implement new function dma_request_slave_channel_reason(), which performs
identically to dma_request_slave_channel(), except that it returns an
error-pointer rather than NULL, which allows callers to detect when
deferred probe should occur.

Eventually, all drivers should be converted to this new API, the old API
removed, and the new API renamed to the more desirable name. This patch
doesn't convert the existing API and all drivers in one go, since some
drivers call dma_request_slave_channel() then dma_request_channel() if
that fails. That would require either modifying dma_request_channel() in
the same way, or adding extra error-handling code to all affected
drivers, and there are close to 100 drivers using the other API, rather
than just the 15-20 or so that use dma_request_slave_channel(), which
might be tenable in a single patch.

acpi_dma_request_slave_chan_by_name() doesn't currently implement
deferred probe. It should, but this will be addressed later.

Cc: treding@nvidia.com
Cc: pdeschrijver@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: dmaengine@vger.kernel.org
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v4:
* Add {} around both branches in of_dma_request_slave_channel().
v3:
* s/_or_err/_reason/ in the new API name.
* Simplify changes to of_dma_request_slave_channel() so that the new
  "bool defer" parameter is not needed.
* Revert changes to acpi-dma.c and handle the return value conversion
  in dma_request_slave_channel_reason() instead.
* Mention that acpi_dma_request_slave_chan_by_name() should implement
  deferred probe, but that will happen later.
v2:
* include <linux/err.h> in <linux/dmaengine.h>
* Return -ENODATA if slave_id or chan_id out-of-range.
* Return an error-pointer not NULL if we can't find a matching DMA
  controller or translate the channel.

This patch is a dependency for:
* A series that reworks many of the Tegra drivers.
* A series that enhances ASoC's dmaengine code to support deferred probe.

As such, it needs to go into a topic branch on its own, based directly
on 3.13-rc1. If the DMA maintainers ack the patches I'm happy to create
this topic branch myself and send a pull request to the DMA tree. Or the
patches can be applied to a topic branch by the DMA maintainers and I
will merge their topic branch into the Tegra rework branch that I
mentioned.
dma: add dma_get_any_slave_channel(), for use in of_xlate()

mmp_pdma.c implements a custom of_xlate() function that is 95% identical
to what Tegra will need. Create a function to implement the common part,
so everyone doesn't just cut/paste the implementation.

Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: dmaengine@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v3:
* Re-implemented the common code as dma_get_any_slave_channel(), in
  dmaengine.c. This allows it to mutex_lock(&dma_list_mutex), and hence
  avoid the retry loop.
* Rather than having the common code call out to a driver-provided
  callback at the tail (which avoided drivers having to implement an
  of_xlate function themselves), have drivers implement a custom
  of_xlate() again, which mostly just calls the new
  dma_get_any_slave_channel(), then does any extra custom work.

v2:
* Squashed the conversion of mmp_pdma.c into the patch that added the
  common implementation, so it's easier to see the whole conversion in
  one go.

This patch is a dependency for a series that reworks many of the Tegra
drivers.

As such, it needs to go into a topic branch on its own, based directly
on 3.13-rc1. If the DMA maintainers ack the patches I'm happy to create
this topic branch myself and send a pull request to the DMA tree. Or the
patches can be applied to a topic branch by the DMA maintainers and I
will merge their topic branch into the Tegra rework branch that I
mentioned.

Note that this patch is independant from the "dma: add channel request
API that supports deferred probe" which I just sent, so it could
(should?) be a different topic branch.
ASoC: dmaengine: support deferred probe for DMA channels

Enhance dmaengine_pcm_request_chan_of() to support deferred probe for
DMA channels, by using the new dma_request_slave_channel_or_err() API.
This prevents snd_dmaengine_pcm_register() from succeeding without
acquiring DMA channels due to the relevant DMA controller not yet being
registered.

Cc: treding@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: alsa-devel@alsa-project.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@linaro.org>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
---
v2:
* Re-ordered patches, so that those which depend on patches to the DMA
  tree appear last.
* Call dmaengine_pcm_release_chan() if dmaengine_pcm_request_chan_of()
  fails, to clean up any partial allocations.

This patch is part of a series with strong internal depdendencies. I'm
looking for an ack so that I can take the entire series through the Tegra
and arm-soc trees. The series will be part of a stable branch that can be
merged into other subsystems if needed to avoid/resolve dependencies.
ARM: tegra: add missing clock documentation to DT bindings

Many of the Tegra DT binding documents say nothing about the clocks or
clock-names properties, yet those are present and required in DT files.
This patch simply updates the documentation file to match the implicit
definition of the binding, based on real-world DT content.

All Tegra bindings that mention clocks are updated to have consistent
wording and formatting of the clock-related properties.

Cc: treding@nvidia.com
Cc: pdeschrijver@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
---
v4:
* Rename DC's "disp1"/"disp2" clocks to "dc", and update the DT files to
  match. This doesn't change the driver ABI, and hence doesn't require
  driver changes.
v3:
* Minor whitespace constency fixes.
v2:
* Removed duplicate documentation for "clocks" property in some nodes.
* Modified dsi example node to match binding requirements.
---
Series cover letter:

This series implements a common reset framework driver for Tegra, and
updates all relevant Tegra drivers to use it. It also removes the custom
DMA bindings and replaced them with the standard DMA DT bindings.

Historically, the Tegra clock driver has exported a custom API for module
reset. This series removes that API, and transitions DT and drivers to
the new reset framework.

The custom API used a "struct clk" to identify which module to reset, and
consequently some DT bindings and drivers required clocks to be provided
where they really needed just a reset identifier instead. Due to this
known deficiency, I have always considered most Tegra bindings to be
unstable. This series removes this excuse for instability, although I
still consider some Tegra bindings unstable due to the need to convert to
the common DMA bindings.

Historically, Tegra DMA channels have been represented in DT using a
custom nvidia,dma-request-selector property. Now that standard DMA DT
bindings exist, convert all Tegra bindings, DTs, and drivers to use the
standard instead.

This series makes a DT-ABI-incompatible change to:
- Require reset specifiers in DT where relevant.
- Require standard DMA specifiers.
- Remove clock specifiers from DT where they were only needed for reset.
- Remove legacy DMA specifier properties.

I anticipate merging this whole series into the Tegra and arm-soc trees
as its own branch, due to internal dependencies. This branch will be
stable and can then be merged into any other subsystem trees should any
conflicts arise.

Cc: ac100@lists.launchpad.net
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: alsa-devel@alsa-project.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: devel@driverdev.osuosl.org
Cc: devicetree@vger.kernel.org
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Dmitry Torokhov <dtor@mail.ru>
Cc: dri-devel@lists.freedesktop.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Julian Andres Klode <jak@jak-linux.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-i2c@vger.kernel.org
Cc: linux-input@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Cc: linux-serial@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Cc: Marc Dietrich <marvin24@gmx.de>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: pdeschrijver@nvidia.com
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Terje Bergström <tbergstrom@nvidia.com>
Cc: treding@nvidia.com
Cc: Wolfram Sang <wsa@the-dreams.de>
ARM: tegra: document reset properties in DT bindings

Update all the Tegra DT bindings to require resets/reset-names properties
where the HW module has reset inputs. Remove any entries from clocks or
clock-names that were only required to identify reset inputs, rather than
referring to real clocks.

This is a DT-ABI-incompatible change. It is the first of two changes
required for me to consider the Tegra DT bindings as stable, the other
being conversion to the common DMA DT bindings.

Cc: treding@nvidia.com
Cc: pdeschrijver@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
---
v2: Minor whitespace consistency fixes.
ARM: tegra: document use of standard DMA DT bindings

Update all the Tegra DT bindings to require the standard dmas/dma-names
properties rather than non-standard nvidia,dma-request-selector property.

This is a DT-ABI-incompatible change. It is the second of two changes
required for me to consider the Tegra DT bindings as stable, the other
being the previous conversion to the common reset bindings.

Cc: treding@nvidia.com
Cc: pdeschrijver@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v4:
* Minor whitespace consistency fixes.
* In the AHUB doc, insert the DMA properties after the ranges property,
  not in the middle of them.
v3: s/iommu/dma/ in the binding doc.
v2: Document the #iommu-cells property in the DMA controller binding.
ARM: tegra: update DT files to add reset properties

An earlier patch updated the Tegra DT bindings to require resets and
reset-names properties to be filled in. This patch updates the DT files
to include those properties.

Note that any legacy clocks and clock-names entries that are replaced by
reset properties are not yet removed; the drivers must be updated to use
the new resets and reset-names properties first.

Cc: treding@nvidia.com
Cc: pdeschrijver@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2: Set VI module's reset ID to 20 rather than matching the synthesized
    clock ID.
ARM: tegra: update DT files to add DMA properties

This patch switches the Tegra DT files to use the standard DMA DT bindings
rather than custom properties. Note that the legacy properties are not yet
removed; the drivers must be updated to use the new properties first.

Cc: treding@nvidia.com
Cc: pdeschrijver@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: devicetree@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
ARM: tegra: select the reset framework

The Tegra clock driver is built unconditionally when Tegra support is
enabled. In order to avoid having to ifdef the forthcoming reset driver
implementation, have ARCH_TEGRA select RESET_CONTROLLER.

Cc: pdeschrijver@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
clk: tegra: implement a reset driver

The Tegra CAR module implements both a clock and reset controller. So
far, the driver exposes the clock feature via the common clock API and
the reset feature using a custom API. This patch adds an implementation
of the common reset framework API (include/linux/reset*.h). The legacy
reset implementation will be removed once all drivers have been
converted.

Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
---
v2: Move the added lines in the file, to avoid the need for function
    prototypes.

This patch is part of a series with strong internal depdendencies. I'm
looking for an ack so that I can take the entire series through the Tegra
and arm-soc trees. The series will be part of a stable branch that can be
merged into other subsystems if needed to avoid/resolve dependencies.
pci: tegra: use reset framework

Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

The old Tegra-specific API used a struct clock to represent the module
to reset. Some of the clocks retrieved during probe() were only used for
reset purposes, and indeed aren't even true clocks. So, there's no need
to get() them any more.

Cc: pdeschrijver@nvidia.com
Cc: linux-tegra@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
---
v2: Remove #include <clk/tegra.h> that's no longer needed.

This patch is part of a series with strong internal depdendencies. I'm
looking for an ack so that I can take the entire series through the Tegra
and arm-soc trees. The series will be part of a stable branch that can be
merged into other subsystems if needed to avoid/resolve dependencies.