[SystemZ] Use zeroing form of RISBG for some AND sequences

RISBG can handle some ANDs for which no AND IMMEDIATE exists.
It also acts as a three-operand AND for some cases where an
AND IMMEDIATE could be used instead.

It might be worth adding a pass to replace RISBG with AND IMMEDIATE
in cases where the register operands end up being the same and where
AND IMMEDIATE is smaller.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186072 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Use zeroing form of RISBG for shift-and-AND sequences

Extend r186072 to handle shifts and ANDs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186073 91177308-0d34-0410-b5e6-96231b3b80d8
[SystemZ] Add testcase missing from r186073


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186074 91177308-0d34-0410-b5e6-96231b3b80d8