imx51-dt: move cpu clock divider handling out to the device tree

A few changes here;

* using just the divider from 800MHz we can't make 166.25MHz but we can make
  160MHz, so use 160000 as our lowest frequency instead
* add cpu_podf_clk handle and "cpu0" connection to our cpu@0 node
* add ccm-clocks subnode and add cpu_podf_clk to it
* pll{1,2,3}_sw clocks had missing #clock-cells, fix that
cpufreq-cpu0: use of_clk_get_by_name to find the clock

of_clk_get(np, 0) would have done just as well but I can't decide if I
like the naming part or not (the regulator is named though so why not?)
imx5-ccm: move CPU divider clock out to the device tree

Removals:
* don't register cpu_podf in the array
* and now we don't need imx_clk_divider_no_srp
* don't need to fake a provider of "cpu0" clock either

Additions:
* imx_divider_setup pulls all the info out of the divider-clock
  nodes passed during an of_clk_init-like loop from imx51_ccm_setup
* imx51_ccm_setup pulls all the ccm children out of the ccm-clocks
  node which acts a lot like the regulators node underneath your
  pmic and does the aforementioned of_clk_init-like loop.

Todo:
* move imx_divider_setup elsewhere? It needs ccm_base though.
* maybe rename it imx5_ccm_divider_setup
* fix that weirdo clk,no-set-rate-parent property to have a more
  reasonable name..
* make a decision on whether it needs to be fsl,imx51-ccm-divider
  instead of just divider-clock
* make a decision on whether it needs to be ccm-clocks or maybe
  something more concise? if it was clocks it could be called by
  of_clk_init but then we might be confusing it with two clocks{}
  nodes..
* get rid of all the extra code and debugging when done

(note to self don't forget to do the same in i.MX53?)

This is a little bit messy and full of debug right now since one
divider is not a full test, we need to move a few more out and
see what the full effect is (IPU next?)

CPU frequency setting is still working, though.. ;)
docs: remove cpu_podf from the imx5 clock provider binding