fix compile

Change-Id: I0b4ab1d110eab373e4bc8df1c0f0fa79c625a19c

libc: Add Scorpion-optimized memcpy and memset

 * Optimized routines from Qualcomm for msm8660 class SoCs
 * Enable with TARGET_CPU_VARIANT := scorpion

Change-Id: I01d0f22efba5a418ddd20fca0d0c570d855e0f6f

Conflicts:
	libc/arch-arm/scorpion/scorpion.mk

libc: Use the fast strlen on Scorpion too

Change-Id: I9ba50a469de27269adc008c2a96767830ad6b70b

libc: krait: Use performance version of bcopy and memmove

Change-Id: I587085aeb0c30ceccaa3f420594a194b129632b5

Conflicts:
	libc/Android.mk
	libc/arch-arm/generic/generic.mk
	libc/arch-arm/krait/krait.mk

libc: Add NEON optimized memmove

ported from cm10.1

bionic-benchmarks on cortex-a9
generic:
BM_string_memmove/8    50000000         67   119.35 MiB/s
BM_string_memmove/64   10000000        175   364.59 MiB/s
BM_string_memmove/512   1000000       1078   474.86 MiB/s
BM_string_memmove/1K    1000000       2072   494.20 MiB/s
BM_string_memmove/8K     100000      16400   499.50 MiB/s
BM_string_memmove/16K     50000      32293   507.35 MiB/s
BM_string_memmove/32K     50000      66585   492.12 MiB/s
BM_string_memmove/64K     10000     160435   408.49 MiB/s

NEON-optimized:
BM_string_memmove/8   100000000         25   319.06 MiB/s
BM_string_memmove/64   50000000         43  1472.60 MiB/s
BM_string_memmove/512  10000000        247  2069.74 MiB/s
BM_string_memmove/1K    5000000        463  2210.08 MiB/s
BM_string_memmove/8K     500000       3465  2363.69 MiB/s
BM_string_memmove/16K    500000       6894  2376.30 MiB/s
BM_string_memmove/32K    100000      15490  2115.38 MiB/s
BM_string_memmove/64K     50000      42097  1556.75 MiB/s

Change-Id: I89253a01fb811438089e16320ac265177a2ca152

Conflicts:
	libc/Android.mk
Bionic/libm: fast neon pow() for small x,y.

Add a fast neon version of pow() suitable for relatively small
positive x and y (between 0 and 4).  Run the standard
implementation in all other cases.  Gives approximately 60%
performance improvement to AnTuTu FPU scores

Change-Id: I97e0712daeb2740764b26a44be0caaa39c481453
(cherry picked from commit df58b162751ccad4f6a9dee1d4d8cdb5aeef39f9)
(cherry picked from commit 844736c1cd73f0118cdeb2f322c84efba0793f54)
(cherry picked from commit 8b74afbad26480891890586e811b5167f43ec28c)
Bionic/libm: Prefer branches and VFP ABI.

For internal functions set gcc attribute "aapcs-vfp" for ARM
and use -fno-if-conversion to prefer branches over predicated
instructions (improves performance on architectures with good
branch prediction).

Change-Id: I8424e0e82a19d35e7e3b6e3e122dcdecdd5426fd
(cherry picked from commit a8ed843c678e2a4019c0b88a7a11ff8e3bdb4f70)
(cherry picked from commit 7cbe6a43c3152147f581cb1423bd14582619a2af)
(cherry picked from commit 885827b36a52939f2434b19d458fc9c18680e54f)
Bionic/libm: Add precision-correct de-serialize sin/cos.

Modify sin/cos to improve performance while retaining bit-for-bit
accuracy with existing algorithm.

Change-Id: Iaba2dd731cd015732744705dad8bddb713b43067
(cherry picked from commit df55e67573e176042c5d2ae084c758bc2e9e0025)
(cherry picked from commit 6a688d7aa4512731c430673ccd4f0d6e3999d439)
(cherry picked from commit 47bb7bc2962bff835000dca016f6319c20734398)
Bionic/libm: Pow optimizations and bug fixes.

Use VFP calling convention for pow_neon handoff function by default.
Fix register usage collision between two different polynomial
coefficients in pow_neon.  Remove conditional execution in pow_neon
and replace with branching.

Change-Id: I76095f4a006e2fb01a53943b66fd69bfa1fd3033
(cherry picked from commit 5f0ee8c38363ecb99f7ceb487583b5e7152e63ce)
(cherry picked from commit f4a020fad7881195bff087b5803e4a7b528b81f1)
(cherry picked from commit 22157646da56cba346893ea17a1de5e4fd689b53)
Bionic/libm: add assembly versions of sin/cos.

Add assembly versions of sin/cos with integrated remainder pi/2
calculation.  Directly extracted from binary libm.so compiled with
__ieee754_rem_pio2 calls inlined.

Change-Id: Ia093f420e58e794635e3a5f09e8236ae7601f1f6
(cherry picked from commit 19a356a1ed6384a9161739d5833cf5cfd88a8d3b)
(cherry picked from commit 1c9bdcfa6a68cd1a13a1e3b1a51616bddffeefad)
(cherry picked from commit cdaad8ab61325e958926b57a6a726d0cfa6f7511)
libm: sqrt and sqrtf via ARM vsqrt instruction

Optimized sqrt and sqrtf for arm by using hardware
opcode for sqrt rather than generic slow portable
code.

Change-Id: I84694159577aef6418710548085d8149c45e0e3f
(cherry picked from commit 434d98cd36cdd2514a7118e69624e5d205ca849a)
(cherry picked from commit 5fe41e6f146bcadd4904da26351c646cdc90d196)
(cherry picked from commit e314f75340c8e818b17373314ceb54039fcd76ad)
libm: optimistic pow calling.

Call optimized pow optimistically and revert to full range
implementation if we detect an out-of-range input.

Change-Id: I6f3aa734adbf99484b7ff70736ef83a41e5815b8
(cherry picked from commit e7fd29685a75f1d26061ac511e7a29479fd871b5)
(cherry picked from commit 7916899916973ca5695526ae45283e54709df32a)
(cherry picked from commit d39a7f744c78409949482e3cb3c9710e8f281a33)
Bionic/libm: enable optimized math functions on more QCOM targets.

allow more QCOM targets to use optimized math functions.

Change-Id: I76ee1bf951ae1c8397fef3af6e9937ed8cad9b62
(cherry picked from commit a7b5a06b144c96324db2370bd63b83c81d41ddc3)
(cherry picked from commit 8ccd613ff555349e0751659ebe03c182dae9a2eb)
(cherry picked from commit ccd4b1db5b225b0b4913b80b014f1c2f99c6fdff)
Bionic/libm: Remove extra vmov from sin/cos.

Move integer representations of x bits on the integer side rather
than moving them to and from the FP registers.

Change-Id: I1895db385c9616cdae9ab6403f392dfbae292adc
(cherry picked from commit 1d0c5a9fe67141515fa54403d985828590f9c206)
(cherry picked from commit ca46b68c30cf470464ffac530b8bdba242cc5c17)
(cherry picked from commit d7acb8827620ab7331995e843fd79015aed84996)
libm: krait: Fix build warning for e_pow.o

e_pow.o given more than once in the same rule. Remove extra arm/e_pow.S
reference in libm/Android.mk.

(cherry picked from commit a730ffa1195ad85a0e77afc9bf2cb78754b5985c)

Change-Id: I5a4c38e838978e0538697c8a5df1e97f1175e39e
(cherry picked from commit 1002139bee177b90dc011b8ac9f24c4696cf82b6)
(cherry picked from commit 99146f7c6c1ee984608ad705b67f562fb9006cd0)
libc: krait: Re-factor high-performance memcpy for thumb2

The majority of libc under bionic is built for thumb2.  Refactor the
high performance memcpy used in previous builds for thumb2, including
information that can be used for stack-unwinding.

Change-Id: Ib5f7ab354f39313758402ec02b0aea27b15d45fa

Conflicts:
	libc/arch-arm/krait/bionic/memcpy_base.S
(cherry picked from commit cdeb493351044c3116fc0d42a64f33f8215a5886)
(cherry picked from commit 0c524faa937b40178915c9478599b754b6f8f78d)
libc/arch-arm/bionic/memcpy.a9.S: memcpy from cortex-strings.

This memcpy code uses NEON/VFP to achieve very good performance
on ARMv7-A processors. It is specifically tuned for A15 but should
provide good performance on A9 also. It is equivalent to the code
in cortex-strings rev 116.

This patch is a follow up the existing gerrit change:

I7f6f77995f3ca903ad9c66d14261441667a2a935

This version includes a tweak for performance on misaligned
buffers and splits the header comment into license and
documentation sections.

Change-Id: Ibd2e23c8d8e01357ba0247be1d05192de3ceba69
Signed-off-by: Will Newton <will.newton@linaro.org>

Conflicts:
	libc/NOTICE
Bump the number of TLS slots to 128.

Bug: 9997352
Change-Id: I7bde7228d803e9d4bb83309c5891d54a07e3b025

Conflicts:
	libc/private/bionic_tls.h
Define PTHREAD_KEYS_MAX and _POSIX_THREAD_KEYS_MAX in a POSIX-compliant way.

Also make sysconf use PTHREAD_STACK_MIN rather than redefining its
own, different, constant.

Bug: 9997352
Change-Id: I9a8e7d2b18e691439abfb45533e82c36eee9e81d
fix broken pointer overflow check ns_name_unpack()

Many compilers optimize away the overflow check `msg + l < msg',
where `msg' is a pointer and `l' is an integer, because pointer
overflow is undefined behavior in C.

Use a safe precondition test `l >= eol - msg' instead.

Change-Id: I3fca2125834073cc36d7e9c4e586e97842265a59
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Fix the detection of alt-network in dns resolver.

Used to determine proper A/AAAA record request.

bug:10132565
Change-Id: I7229f6672e879920a6fae58672cddd72db78546c

Conflicts:
	libc/netbsd/net/getaddrinfo.c
Add ssse3 implementation of __memcmp16.

__memcmp16 was missing in x86. Also added C-version for backward
compatibility. Added bionic test for __memcmp16 and for wmemcmp.

Change-Id: I33718441e7ee343cdb021d91dbeaf9ce2d4d7eb4
Signed-off-by: Alexander Ivchenko <alexander.ivchenko@intel.com>

Conflicts:
	libc/arch-x86/string/ssse3-memcmp3-new.S
	libc/arch-x86/string/ssse3-wmemcmp-atom.S
	libc/arch-x86/x86.mk

Conflicts:
	libc/arch-x86/x86.mk
libc: Update to latest cortexa15 memcpy code.

This uses the new code original submitted as memcpy.a15.S as
the base. However, the old code handled unaligned src/dst better
so that was spliced in. I optimized the original unaligned code by
removing a few unnecessary instructions. I optimized the a15 code by
rewriting the pre and post code. I also modified the main loop to add
a pld so that larger copies would not stall waiting for memory.

Test cases for the new memcpy:

- Copy all sized values from 0 to 1024 bytes, using whatever alignment
  is returned by malloc.
For each alignment case described below, the test copied from 0 to 128
bytes.
- Src and dst pointers are both aligned to the same value, starting
  at one going through every power of two up to and including 128.
- Src aligned to double word boundary, dst aligned to word boundary.
- Src aligned to word boundary, dst aligned to double word boundary.
- Src aligned to 16 bit boundary, dst aligned to word boundary.
- Src aligned to word boundary, dst aligned to 16 byte boundary.
- Src aligned to word boundary, dst aligned to 1 byte from a word
  boundary.
- Src aligned to word boundary, dst aligned to 2 bytes from a word
  boundary.
- Src aligned to word boundary, dst aligned to 3 bytes from a word
  boundary.
- Src aligned to 1 byte from a word boundary, dst aligned to a word
  boundary.
- Src aligned to 2 bytes from a word boundary, dst aligned to a word
  boundary.
- Src aligned to 3 bytes from a word boundary, dst aligned to a word
  boundary.

Cases to verify the unaligned source code properly aligns to a 16 bit
boundary.
- Src aligned to 1 byte from a 128 bit boundary, dst aligned to
  4 + 128 bit boundary.
- Src aligned to 1 byte from a 128 bit boundary, dst aligned to
  8 + 128 bit boundary.
- Src aligned to 1 byte from a 128 bit boundary, dst aligned to
  12 + 128 bit boundary.
- Src aligned to 1 byte from a 128 bit boundary, dst aligned to
  16 + 128 bit boundary.

In all cases, a two byte fencepost was placed at the end of the
destination to verify that only the requested number of bytes were copied.

Bug: 8005082

Merge from internal master.

(cherry-picked from commit 21ede92d794969f22cacbdb9f557818f1c5712b5)

Change-Id: Ief70c9e6dc8c6473ae245b6570b2c266fed9618c

Add missing branch in memcpy.S dst aligned case.

Merge from internal master.

(cherry-picked from commit 6ffaa931c362602a2b606a610c92326a425a876e)

Change-Id: Ifdcf01fd122866cf0d4c5b5f7a997803561d7889

Rewrite memset for cortexa15 to use strd.

Merge from internal master.

(cherry-picked from commit 7ffad9c120054eedebd5f56f8bed01144e93eafa)

Change-Id: Ia67f2a545399f4fa37b63d5634a3565e4f5482f9

Conflicts:
	libc/arch-arm/cortex-a15/bionic/memcpy.S
	libc/arch-arm/cortex-a15/bionic/memset.S
Update kernel input headers

To upstream SHA e1c85813f3832b909d1c4309b213bb0a52c79ba5

Change-Id: I72ee3d59c105bc0252b5ca0c49c569d12ec685d1