netfilter: nf_{log,queue}: fix compilation without CONFIG_PROC_FS

This patch fixes the following compilation error:

net/netfilter/nf_log.c:373:38: error: 'struct netns_nf' has no member named 'proc_netfilter'

if procfs is not set.

The netns support for nf_log, nfnetlink_log and nfnetlink_queue_core
requires CONFIG_PROC_FS in the removal path of their respective
/proc interface since net->nf.proc_netfilter is undefined in that
case.

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Acked-by: Gao feng <gaofeng@cn.fujitsu.com>
netfilter: update MAINTAINERS file

* Remove reference to ipchains (not any longer in the tree)
* Remove all P: (person) as this tag is obsolete according to the
  description. Therefore, update Jozsef Kadlecsik to M: so he can
  still show in the list of people.
* Add URI to Netfilter's patchwork at ozlabs.org
* Update URIs to Netfilter's git trees to point to kernel.org.

Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
cifs: only set ops for inodes in I_NEW state

It's generally not safe to reset the inode ops once they've been set. In
the case where the inode was originally thought to be a directory and
then later found to be a DFS referral, this can lead to an oops when we
try to trigger an inode op on it after changing the ops to the blank
referral operations.

Cc: <stable@vger.kernel.org>
Reported-and-Tested-by: Sachin Prabhu <sprabhu@redhat.com>
Signed-off-by: Jeff Layton <jlayton@redhat.com>
Signed-off-by: Steve French <smfrench@gmail.com>
ARM i.MX6q: Fix periph_clk2_sel and periph2_clk2_sel clocks

The periph_clk2_sel mux can be set to pll3, osc/pll1_ref_clk, or osc/
pll2_burn_in_clk. The periph2_clk2_sel mux can be set to pll3 or pll2.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ARM i.MX6: correct MLB clock configuration

According to the i.MX6 Dual/Quad technical reference manual
(Figure 18-2. Clock Tree - Part 1) the MLB clock is directly
feed by the AXI_CLK_ROOT. This is called 'axi' in our code.

Note that the clock of the MLB IP block on the i.MX6 is completely
independent of the PLL8 (MLB PLL). The MLB PLL isn't responsible
for feeding the MLB IP block with a clock. Instead, it's used
internally by the MLB module to sync the bus clock in case the MLB
6-pin interface is enabled:

MediaLB Control 0 Register, MLB150_MLBC0[5], MLBPEN:
1 MediaLB 6-pin interface enabled. MLB PLL and MLB PHY is enabled in this case.

I.e. the PLL8 MLB PLL has to be handled by the MLB driver and isn't needed
for clocking the MLB module itself.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jiada Wang <Jiada_Wang@mentor.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
ARM: imx: replicate the diagnostic register of boot cpu into secondary cores

The diagnostic register holds the errata bits.  Mostly bootloader
does not bring up secondary cores, so that when errata bits are set
in bootloader, they are set only for boot cpu.  But on a SMP
configuration, it should be equally done on every single core.
Set up the diagnostic register for secondary cores by replicating
the register from boot cpu.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
ARM: imx: fix typo in gpu3d_shader_sels

There is no clock pll2_pfd9_720m.  Instead it should be pll3_pfd0_720m.
Fix the typo in gpu3d_shader_sels.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
ARM: sunxi: Fix Mini X-plus device tree build

Commit b00adbe0 ("ARM: sunxi: Rename uart nodes to serial") changed the
node names in the DTSI, changes that were not accordingly made to the
Mini X-Plus device tree. This breakage slipped through because it was
not properly declared in the Makefile.

Fix both issues.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: mvebu: do not duplicate the mpic alias

The mpic alias is already defined in the common armada-370-xp.dtsi, so
there's no need to repeat it at the armada-xp.dtsi and armada-370.dtsi
level.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Kirkwood: Enable PCIe port 1 on QNAP TS-11x/TS-21x

Enable KW_PCIE1 on QNAP TS-11x/TS-21x devices as newer revisions
(rev 1.3) have a USB 3.0 chip from Etron on PCIe port 1.  Thanks
to Marek Vasut for identifying this issue!

Cc: <stable@vger.kernel.org> # v2.6.36.x
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: plat-orion: add missing ehci include to common.h

Removing orion ehci include from board files will raise a compiler
error because plat/common.h is using an enum provided by orion ehci
but not including the include itself. This just adds the missing include.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: mvebu: Add a ranges entry to translate devbus childs

With the latest device tree reorganization which introduced the
'internal-reg' node, now the only region translated is the internal register's.
This makes the description of the hardware incomplete, for it lacks the
Device Bus childs address space.

In order to fix this, it's required to add a 'ranges' entry with a suitable
address space to map Device Bus childs, on a per-board basis.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: Orion: Remove redundant init_dma_coherent_pool_size()

The patch:

  387870f mm: dmapool: use provided gfp flags for all dma_alloc_coherent() calls

makes these calls on Kirkwood and Orion5x redundant. The drivers are
not making atomic requests for coherent memory and hence the default
pool size is now sufficient.

Jason Cooper added mach-mvebu/ hunk, and corrected minor typos in commit
message.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARM: ux500: Remove duplicated assignment of ab8500_platdata

Since: "05ec260 mfd: db8500-prcmu: update resource passing", the AB8500's
platform data 'ab8500_platdata' is passed directly as an attribute to
'db8500_prcmu_pdata', so there's no requirement to assign it a second
time. In fact, it's only due to an ordering issue that the entire
'db8500_prcmu_pdata' data structure isn't completely over-written by the
assignment in u8500_init_devices().

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ARM: ux500: Fix incorrect DEBUG UART virtual addresses

A recent move to rid header files which were hindering multiplatform
support forced address allocations out of the headers and into the
files which were using them. We also lost some useful macros such as
IO_ADDRESS(), so physical -> virtual addressing has been carried out
manually in this case. Unfortunately the incorrect value was converted.
This patch rectifies the error and ensures earlyprintk works again.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ARM: ux500: Provide device enumeration number suffix for SMSC911x

First Ethernet device has a ".0" appended onto the device name.
Since on a non-DT boot the ethernet will be named "smsc911x.0"
and since the clocks are not converted to device tree these
names need to be matched when providing the name from
auxdata.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[edited commit message]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ARM: at91/trivial: fix model name for SAM9X25-EK

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org> # 3.8+
ARM: at91/trivial: typo in GEM compatible string

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM: at91: dts: request only spi cs-gpios used on sama5d3x cpu module

Instead of requesting all available spi cs-gpios, request only the ones used on
the board, in our case on the cpu module.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
tg3: Skip powering down function 0 on certain serdes devices

On the 5718, 5719 and 5720 serdes devices, powering down function 0
results in all the other ports being powered down. Add code to skip
function 0 power down.

v2:
 - Modify tg3_phy_power_bug() function to use a switch instead of a
   complicated if statement. Suggested by Joe Perches.

Cc: <stable@vger.kernel.org>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Nithin Nayak Sujir <nsujir@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>