fix sx1 and sx1b instruction decoding

sx1 mvc instruction onmy use B register but can use either S1 or S2
unit wether sx1b bnop instruction use B0-B15 (ans either S1 or S2)
but ignore RS bit in fetch packet header.

* include/opcode/tic6x.h: add two new operand coding for both cases
* opcodes/tic6x-dis.c: handle the two new operand codings
* include/opcode/tic6x-opcode-table.h: fix sx1 and sx1b opcodes
testsuite: continued implementation