ASM backend: Fix LONGINT load/spill to handle both dwords (closes #651)

This patch reworks how ir-tac handles loading values from stack into
registers before operations and spilling registers onto stack when needed,
specifically longints which are special because they use two vregs each,
for low and high dwords.

The old hPreserveRegs() function allowed individual dwords from longints
to be spilled to stack separately. I.e. one dword spilled to stack, while
the other could keep using a register. This breaks the assumption that for
a longint, both vregs are either both in (consecutive) memory or both in
registers.

Specifically all the regEnsure() calls, i.e. code like this:
    if( ISLONGINT( v1_dtype ) ) then
        regTB()->ensure( regTB(), vreg->vaux, size, FALSE )
    end if
    regTB()->ensure( regTB(), vreg, size )
passed doload=FALSE for the vaux vreg, which was passed on to irLoadVR()
and always prevented vaux from being re-loaded again. As long as both
longint dwords stay together, that's ok, because the regEnsure()/irLoadVR()
done afterwards for the main vreg will load both dwords. So normally the
purpose of doload=FALSE is to avoid loading the high dword twice.

Of course, if the main vreg cannot be relied upon as source of information
about its vaux, this breaks.

This patch changes hPreserveRegs() to always spill both longint dwords,
if either needs to be spilled, to prevent the issue. This fixes the second
issue noted in #651.

The main problem with doing this is that some code in ir-tac, such as
hPreserveRegs(), cycles through registers, and retrieves the associated
vregs. It's not immediately possible to know whether the returned vreg is
a "main" vreg, or just the vaux of a longint vreg, because aux vregs don't
have back-links to their parents.

To solve this, I changed the reg module to store the "vaux parent" pointers
alongside the vregs associated with each register. Main vregs will have
NULL stored, and aux vregs will have their parent stored here. This way
hPreserveRegs() and similar register-cycling loops can still determine and
work with the main vreg, in case it "only" retrieved a vaux.

Other solutions may be possible, for example storing a boolean for each
vreg associated to a register in the reg module, and adjusting the
getFirst() and getNext() functions to return main vregs first, instead of
simply going through the registers.

This patch also adds a regPopReg() call to regAllocate() to ensure to
remove the register from the free list again after irStoreVR() freed it via
regFree(). This is the important part for fixing the original issue from
#651 as it prevents the register that's just being allocated by force from
remaining in the free list. This affected only registers used by LONGINT
aux vregs, because the old irStoreVR() only called regFree() in that case.