defconfig: msm8610: enable wakelock in kernel

Enable wakelock framework in kernel space. Holding a wakelock
can prevent the system from going to low power state.

Change-Id: I4bb3cac0a3f8cfae85956748dbc9b6981a869988
Signed-off-by: Harry Yang <harryy@codeaurora.org>
mmc: sdio: Update the argument for data copy

Incorrect arguments were passed to strlcpy() which causes Manufacturer
information to be copied partially in the SDIO core layer code. Use
 appropriate arguments to copy the string value properly.

CRs-Fixed: 434831
Change-Id: I4a70bfc8dff31b216a6097c08f824a1f1b002d5d
Signed-off-by: Pratibhasagar V <pratibha@codeaurora.org>
arm/dt: msm8974: Remove cell-index used for UART device enumeration

Currently HSUART driver uses auto increment approach for selecting id
by default. HSUART driver would increment id based on HSUART device
binding with driver. Cell-index is no longer used as id to enumerate
the device. Hence removing the cell-index entry from device tree.

Change-Id: I448a33889b11000ab4fef249ec148f295a1e9222
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
arm/dt : 8974 : Update max address size of BLSP2 BAM device

Each BLSP device has 6 UART and 6 QUP (having I2C and SPI subcore) cores.
These cores share one BAM device(i.e. DMA Engine) available on each BLSP.
All these cores' (UART/SPI/I2C) drivers are independent and SPS driver
is not registering available BLSP based BAM device. SPS driver provides
APIs to query to see if BAM device is already register or not, otherwise
it is required to be registered by BLSP based device's driver.

BLSP2 BAM have 24 pipes and each UART and QUP has alloacted 2 pipes.
If only BAM device registered with address space by considering allocated
pipes for the same, next device would not be able to register BAM device
and received BAM device handler would not allow the other core to
programmed required pipes related registers allocated for that core. Hence
update max address size of BLSP2 BAM device considering all devices' pipe
address space. Each pipe has 0x1000 bytes register address space, and BAM
top-level registers also have 0x1000 bytes address space. Hence use 0x19000
as the max address size of BLSP2 BAM device.

Change-Id: Icdcbc3aea66598894ebaaac8a3e17efe02d3e64e
Signed-off-by: Saket Saurabh <ssaurabh@codeaurora.org>
cpuidle: refactor out cpuidle_enter_state

Split the code to enter a state and update the stats into a helper
function, cpuidle_enter_state, and export it.  This function will
be called by the coupled state code to handle entering the safe
state and the final coupled state.

Change-Id: I7b18848370c61408de5960e3844e8faf426fa575
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Colin Cross <ccross@android.com>
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
cpuidle: fix error handling in __cpuidle_register_device

Fix the error handling in __cpuidle_register_device to include
the missing list_del.  Move it to a label, which will simplify
the error handling when coupled states are added.

Change-Id: I1e0fcbf97e9542c3f5f7634ef9bfc126d518d51e
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Colin Cross <ccross@android.com>
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
cpuidle: add support for states that affect multiple cpus

On some ARM SMP SoCs (OMAP4460, Tegra 2, and probably more), the
cpus cannot be independently powered down, either due to
sequencing restrictions (on Tegra 2, cpu 0 must be the last to
power down), or due to HW bugs (on OMAP4460, a cpu powering up
will corrupt the gic state unless the other cpu runs a work
around).  Each cpu has a power state that it can enter without
coordinating with the other cpu (usually Wait For Interrupt, or
WFI), and one or more "coupled" power states that affect blocks
shared between the cpus (L2 cache, interrupt controller, and
sometimes the whole SoC).  Entering a coupled power state must
be tightly controlled on both cpus.

The easiest solution to implementing coupled cpu power states is
to hotplug all but one cpu whenever possible, usually using a
cpufreq governor that looks at cpu load to determine when to
enable the secondary cpus.  This causes problems, as hotplug is an
expensive operation, so the number of hotplug transitions must be
minimized, leading to very slow response to loads, often on the
order of seconds.

This file implements an alternative solution, where each cpu will
wait in the WFI state until all cpus are ready to enter a coupled
state, at which point the coupled state function will be called
on all cpus at approximately the same time.

Once all cpus are ready to enter idle, they are woken by an smp
cross call.  At this point, there is a chance that one of the
cpus will find work to do, and choose not to enter idle.  A
final pass is needed to guarantee that all cpus will call the
power state enter function at the same time.  During this pass,
each cpu will increment the ready counter, and continue once the
ready counter matches the number of online coupled cpus.  If any
cpu exits idle, the other cpus will decrement their counter and
retry.

To use coupled cpuidle states, a cpuidle driver must:

   Set struct cpuidle_device.coupled_cpus to the mask of all
   coupled cpus, usually the same as cpu_possible_mask if all cpus
   are part of the same cluster.  The coupled_cpus mask must be
   set in the struct cpuidle_device for each cpu.

   Set struct cpuidle_device.safe_state to a state that is not a
   coupled state.  This is usually WFI.

   Set CPUIDLE_FLAG_COUPLED in struct cpuidle_state.flags for each
   state that affects multiple cpus.

   Provide a struct cpuidle_state.enter function for each state
   that affects multiple cpus.  This function is guaranteed to be
   called on all cpus at approximately the same time.  The driver
   should ensure that the cpus all abort together if any cpu tries
   to abort once the function is called.

update1:

cpuidle: coupled: fix count of online cpus

online_count was never incremented on boot, and was also counting
cpus that were not part of the coupled set.  Fix both issues by
introducting a new function that counts online coupled cpus, and
call it from register as well as the hotplug notifier.

update2:

cpuidle: coupled: fix decrementing ready count

cpuidle_coupled_set_not_ready sometimes refuses to decrement the
ready count in order to prevent a race condition.  This makes it
unsuitable for use when finished with idle.  Add a new function
cpuidle_coupled_set_done that decrements both the ready count and
waiting count, and call it after idle is complete.

Change-Id: If304c55c17c4aadd693f843d941fb0e6c3375ac0
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Trinabh Gupta <g.trinabh@gmail.com>
Cc: Deepthi Dharwar <deepthi@linux.vnet.ibm.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
cpuidle: coupled: add parallel barrier function

Adds cpuidle_coupled_parallel_barrier, which can be used by coupled
cpuidle state enter functions to handle resynchronization after
determining if any cpu needs to abort.  The normal use case will
be:

static bool abort_flag;
static atomic_t abort_barrier;

int arch_cpuidle_enter(struct cpuidle_device *dev, ...)
{
	if (arch_turn_off_irq_controller()) {
	   	/* returns an error if an irq is pending and would be lost
		   if idle continued and turned off power */
		abort_flag = true;
	}

	cpuidle_coupled_parallel_barrier(dev, &abort_barrier);

	if (abort_flag) {
	   	/* One of the cpus didn't turn off it's irq controller */
	   	arch_turn_on_irq_controller();
		return -EINTR;
	}

	/* continue with idle */
	...
}

This will cause all cpus to abort idle together if one of them needs
to abort.

Change-Id: I7be85033338d14e7089a8f5a1cfb761809984a0e
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
cpuidle: coupled: fix sleeping while atomic in cpu notifier

The cpu hotplug notifier gets called in both atomic and non-atomic
contexts, it is not always safe to lock a mutex.  Filter out all events
except the six necessary ones, which are all sleepable, before taking
the mutex.

Change-Id: I3f5b09334e172d1d62620a5b9929942651f0620c
Signed-off-by: Colin Cross <ccross@android.com>
Reviewed-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: clock-9625: Remove LPASS clocks

LPASS clocks are being controlled by the LPASS subsystem itself now.
So remove the control of LPASS clocks from Apps.

Change-Id: Id9af4e9c53af1bc562ef8a772871d7d59d5b5f97
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
gpu: ion: check for leaks in ion_client_destroy

If an ion client is destroyed without destroying all handles created
by that client, there will be leaked buffers. Print a message if this
happens.

Change-Id: Id674f508666d506b3a9ee848adbc29435c5fe8c2
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
msm: clock-9625: Support measurement on both v1 and v2 hardware

IPA and QPIC clocks measurement is only supported on v2. With the current
implementation of supporting these clocks measurement on v1 too, the
clock test will fail on v1.

To fix this problem, constructing the measurement mux during runtime based
on the hardware version so that only measurable clocks are exported.

Change-Id: I27b4cfc8ea59727ec6204dc325b987e7cddf2b18
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
msm: clock-9625: Remove GPLL0, GPLL1 and A5PLL configuration

The bootloaders configure GPLL0, GPLL1 and A5PLL. Do not configure
them in linux clock driver.

Change-Id: If70b1f24be46a38e365cc581e72863616e337665
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
msm: mdss: round smp allocations to a power of two

First revision of MDSS has issues with shared memory pool when the
number of blocks allocated is not a power of two. In order to avoid
these, the number of allocated SMP blocks should be of a power of two.

CRs-Fixed: 455423
Change-Id: I5d766d568b33eb53796a726b3ce5c863a7b51f3e
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
msm: ispif: Protect shared resource

Add a spinlock and a boolen wait_timeout to protect shared resource
between IRQ handle and userspace IOCTL access. There should have no
complete if timed out or interrupted.

Change-Id: Ibf28da252fb665e997c89344a85a817ed14c5b81
CRs-Fixed: 452849
Signed-off-by: Mingcheng Zhu <mingchen@codeaurora.org>
xhci: Fix bug after deq ptr set to link TRB.

This patch fixes a particularly nasty bug that was revealed by the ring
expansion patches.  The bug has been present since the very beginning of
the xHCI driver history, and could have caused general protection faults
from bad memory accesses.

The first thing to note is that a Set TR Dequeue Pointer command can
move the dequeue pointer to a link TRB, if the canceled or stalled
transfer TD ended just before a link TRB.  The function to increment the
dequeue pointer, inc_deq, was written before cancellation and stall
support was added.  It assumed that the dequeue pointer could never
point to a link TRB.  It would unconditionally increment the dequeue
pointer at the start of the function, check if the pointer was now on a
link TRB, and move it to the top of the next segment if so.

This means that if a Set TR Dequeue Point command moved the dequeue
pointer to a link TRB, a subsequent call to inc_deq() would move the
pointer off the segment and into la-la-land.  It would then read from
that memory to determine if it was a link TRB.  Other functions would
often call inc_deq() until the dequeue pointer matched some other
pointer, which means this function would quite happily read all of
system memory before wrapping around to the right pointer value.

Often, there would be another endpoint segment from a different ring
allocated from the same DMA pool, which would be contiguous to the
segment inc_deq just stepped off of.  inc_deq would eventually find the
link TRB in that segment, and blindly move the dequeue pointer back to
the top of the correct ring segment.

The only reason the original code worked at all is because there was
only one ring segment.  With the ring expansion patches, the dequeue
pointer would eventually wrap into place, but the dequeue segment would
be out-of-sync.  On the second TD after the dequeue pointer was moved to
a link TRB, trb_in_td() would fail (because the dequeue pointer and
dequeue segment were out-of-sync), and this message would appear:

ERROR Transfer event TRB DMA ptr not part of current TD

This fixes bugzilla entry 4333 (option-based modem unhappy on USB 3.0
port: "Transfer event TRB DMA ptr not part of current TD", "rejecting
I/O to offline device"),

	https://bugzilla.kernel.org/show_bug.cgi?id=43333

and possibly other general protection fault bugs as well.

This patch should be backported to kernels as old as 2.6.31.  A separate
patch will be created for kernels older than 3.4, since inc_deq was
modified in 3.4 and this patch will not apply.

Change-Id: I3ea9d7ec7f404f512be2cd135483da784cf63f11
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Tested-by: James Ettle <theholyettlz@googlemail.com>
Tested-by: Matthew Hall <mhall@mhcomputing.net>
Cc: stable@vger.kernel.org
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
msm: pm: Add support to query cpu status

During hotplug operation primary core is required to query
cpu registers to determine whether secondary core has
successfully shutdown.

Change-Id: I9dc359e2af20f79127a74f2c087fa39614f18957
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
input: atmel_mxt_ts: suppress touches when T42 message not sent

Touch suppression is sent from controller through T9 object
for 336S, not T42 object.  Check for status bit which represents
a suppressed touch, and if it is set, release all touches.

CRs-fixed: 452636
Change-Id: Ib9df8cb5a87cdc8b94b1e9058879a265a8e3fac6
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
diag: Reduce error message frequency

Some diag error messages are printed with high frequency. This
causes flooding of kernel logs. Rate limiting these messages will
help reading kernel logs.

Change-Id: I009df4526de9079cb61d9062af41f09bf07e8e6d
CRs-fixed: 455623
Signed-off-by: Ravi Aravamudhan <aravamud@codeaurora.org>
msm: camera: Align ISP 3.2 to new driver architecture

This change aligns ISP 3.2 to new ISP driver architecture,
and takes care of version specific register configurations.

msm_vfe32_process_stats_irq is replaced with common
function msm_isp_process_stats_irq.

Change-Id: I6b9df7145253b893b3de914d4cc284f265173989
Signed-off-by: Kevin Chan <ktchan@codeaurora.org>
Signed-off-by: Shuzhen Wang <shuzhenw@codeaurora.org>