hardlockup: detect hard lockups without NMIs using secondary cpus

Emulate NMIs on systems where they are not available by using timer
interrupts on other cpus.  Each cpu will use its softlockup hrtimer
to update a per-cpu timestamp and then check the timestamp on the
next cpu.

The emulation uses the softlockup threshold instead of the hardlockup
threshold because the implementation runs at the same resolution as
the softlockup detector.

This patch is useful on systems where the hardlockup detector is not
available due to a lack of NMIs, for example most ARM SoCs.
Without this patch any cpu stuck with interrupts disabled can
cause a hardware watchdog reset with no debugging information,
but with this patch the kernel can detect the lockup and panic,
which can result in useful debugging info.

Change-Id: I3e6de6da27183b2a0a73a390e394f95a945856d9
Signed-off-by: Colin Cross <ccross@android.com>
Merge branch 'jb_2.5' of git://codeaurora.org/kernel/msm into cm-10.1

Change-Id: I88f2c14f25c6ea7227763c1737d4dba294a092d4

Conflicts:

	arch/arm/mach-msm/ipc_socket.c

Signed-off-by: task650 <task650@gmail.com>
d2: Fix and consolidate persistent_ram code

* Move persistent_ram back to the end of lowmem. For some reason it is
getting clobbered randomly at it's current location.
 * Also consolidate the code into devices-8960 where it can be shared.
I forgot to add this for the Verizon users