[tilegx] Expand ATOMIC_LOAD_SUB into libcall.

  No native support.
[tilegx] Add i32/64 => f32/64 bitcast.

  Because TILE-Gx reuse integer reg as float reg, there is no need
to use special instructions to move between different reg class.
  While Mips need to use mfc/mtc to finish this.
[tilegx] Optimize FABS with bfins.
[tilegx] Optimize FCOPYSIGN using bfextu/bfins.