Adds a lot of files, some of the jRIO raw functions, and the interfaces are almost all completed
Finished the PWM line and starting the speed controllers. The module design should be complete minus some methods in the DigitalModule and the AnalogModule entirely.
Expanded the Digital module further and added the Digital Input/Output classes. They still need to be completed
Changed definition of ModuleNumber to mean the location out of 8 slots on the cRIO. This makes configurability easier to understand.
Merge pull request #6 from iismathwizard/master

Update Tested