RTC: Add functionality to read/write rtc scratch registers.

Many RTCs provide scratch registers that are maintained so long as the RTC
has power. Provide a generic method to access these registers.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
MFD: Don't set TPS65217 STATUS_OFF until an actual power off event.

This allows the TPS to be used with RTC only suspend/resume, otherwise
it powers off when attempting suspend.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
REGULATOR: Enable suspend configuration for tps65217

This allows platform data to specify which power rails should be on or off
during RTC only suspend. This is necessary to keep DDR state while in RTC
only suspend.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
REGULATOR: Don't warn if platform data doesn't indicate a sleep mode.

It is common for systems to just use the power-on reset value of the PMIC.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
ARM: OMAP: Allow RTC pmic_ext_wakeup to be configured by platform data.

pmic_ext_wakeup is used to wake the system from RTC only suspend.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
ARM: AM33XX: Configure RTC pmic_enable_en for Beaglebone

The proper configuration of pmic_power_en is necessary to wake from
RTC-only suspend.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
ARM: OMAP2+: Basic Beaglebone LT support

Provide basic Beaglebone LT support. Not very well tested and does not
support eMMC or HDMI.

Beaglebone LT is the test platform for RTC-only.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
ARM: AM33XX: Create a debugfs file to specify sleep mode.

Currently only DEEPSLEEP0 is available. This is necessary to be able to
select RTC-only once added.

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
ARM: AM33XX: Add RTC-only suspend

During RTC-only suspend, power is lost to the wkup domain, so we need to save
and restore the state of that domain. We also need to store some information
within the RTC registers so that u-boot can do the right thing at powerup.

The state is entering by getting the RTC to bring the pmic_power_en line low,
which will instruct the PMIC to disable the appropriate power rails after
putting DDR into self-refresh mode. To bring pmic_power_en low, we need to get
an ALARM2 event. Since we are running from SRAM at that point, it means
calculating what the next second is (via ASM) and programming that into the
RTC.

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Russ Dill <Russ.Dill@ti.com>