ARC: [SMP] don't use identity AUX reg.

With identity num of CPUs is limited to 256 (8 bit).
We use our own alternative AUX register GLOBAL_ID (12 bit).
Now we can support up to 4096 CPUs.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [SMP] enlarge possible NR_CPUS

32 is not enough we need 4096

NOTE for CONFIG_ARC_CURR_IN_REG:
when using large number like 4096 assembler breaks.
complain about st/st_as which provide offset beyond s9
this is since TASK_THREAD depends on NR_CPUs.
need to rewrite all such assembly code in entry.h to use register.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [SMP] init cpus maps according to given maps.

platform can set its own set of possible/present cpus at run time.

NOTE: map must include cpu 0.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [SMP] reset sw-asid before getting new context

Handle issue where task run on CPU A then migrate to CPU B and there it
fork. Now it got COW and hence new context. Finally this task migrate
back to CPU A and erroneously used invalid ASID.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [SMP] copy_to_user_page be aware of all I$ around

When using ptrace there is need to flush icache when application
is on different CPU than gdbserver.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [SMP] STAR 9000597649 workaround

When doing TLB flush, simulator (nSIM)
trigger flush of internal cache (designed for optimization).

Signed-off-by: Noam Camus <noamc@ezchip.com>
NET: Add network driver

This patch adds an driver for the debug LAN device used in EZchip NPS boards.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [plat-eznps] Add eznps platform

This platform include boards:
	Hardware Emulator (HE) version 0,1...
	Simulator based upon nSIM.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [plat-eznps] Add eznps default board configurations

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [plat-eznps] Add eznps DTS file

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [plat-eznps] Add device for Data Plane Linux

Add new device /dev/dpl.
This device enable access to cmem in other cores.

It is usefull for debugging when gdbserver is attached to process
which runs in a different CPU than gdbserver.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Tal Zilcer <talz@ezchip.com>
ARC: [SMP] TLB flush

This is for cases we need to flush tlb's in several CPU's since a memory
structure may be held by several threads in the same time in different
CPU's.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [SMP] ASID handle

Each CPU got its own TLB and therefore it's own software cache.
Each mmu context may reside at the same time in several CPU's
thanks to posix threads sharing the context.
Therefore may have different ASID.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: Add initrd from external file.

We now can easly get rootfs from external file.
It may be cpio, ext2, cramfs...

This makes vmlinux usable not only for internal cpio.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: Handle un-aligned user space access in BE.

Adding endian awarness to un-aligned access exception handling.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: Change IRQ init order.

this is workaround
Need to reverse implementaion inside platform

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: add CPUSET/NOHZ syscall hooks

CPUSET/NOHZ requires hook for each entry and exit from kernel
of dyntick enabled task.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: add CPUSET/NOHZ fault/trap handling hooks

CPUSET/NOHZ requires hooks for entry and exit from/to kernel.
This patch adds the needed ARC hooks for traps and faults.

Signed-off-by: Noam Camus <noamc@ezchip.com>
ARC: [plat-eznps] add support for NO_HZ_FULL

Select configuration needed as NO_HZ_FULL deps.

Signed-off-by: Noam Camus <noamc@ezchip.com>
time: remove 64BIT config dep for NO_HZ_FULL

Although ARC is 32BIT I still wan't to use NO_HZ_FULL.

Signed-off-by: Noam Camus <noamc@ezchip.com>