Correct and enhance core.cpuid

The bits for the extended features (EAX=7,ECX=0) were off by one. In addition to the correction the bits for the rdseed and sha instructions are added with corresponding support functions.

The cpuid bits are documented in the intel architecture software developer manual, volume 2, chapter 3.2.
http://www.intel.de/content/www/de/de/architecture-and-technology/64-ia-32-architectures-software-developer-manual-325462.html

Information about the new SHA instructions can be found here:
http://software.intel.com/en-us/articles/intel-sha-extensions-implementations