Setup cmake build system.  Configures dirs/schema/other system info during build.  Not tested yet.
.sh files are moved to bin.  ibmad library is linked against.
nfs statsvers=1.1 on stampede seems to be compatible with statsvers=1.0.  The nfs.c file has been updated to reflect this and these counters can be collected on stampede builds.
TYPES are sorted alphabetically in cmake.  allows binary search n stats_type_get
added function to get cpuid signatures from intel chips.
Added SNB fixed and core counters to intel_snb.c.  Not uncore yet.  Tough to tell if working properly but no obvious issues.
tacc_stats PMC counter files now ID different chip microarchitectures.  A microarchitecture specific counter file must be supplied for each CPU that has non-architectural events. Currently AMD family 0x10, and intel westmere, nehalem, and sandy bridge are supported by tacc_stats.
Nehalem and Sandybridge now have their own core counters.  Changed NHM and SNB schema names to be more consistent with existing AMD schema.
Adding uncore counters for SNB.  Added MSR-type addresses - C-box and PMU.  U-box is ignored for now.
Added C-Box counters for SNB Uncore.  The interesting events to count will take some time to determine.  I just picked 4 for now.
SNB CBox and PCU counters are setup.
Memory Controller counters setup and running.
added QPI Link Layer counters.  Performance monitoring for this is currently disabled by the BIOS so it' stough to check.
Home Agent Unit counters added.  These appear to enabled.
Added R2PCIe Unit counters.  All counters McCalpin was interested in are now incorporated into tacc_stats.  They need some form of testing.
All suggested counters are  nominally programmed. To do:
1) CBox events need to be chosen
2) QPI Unit monitors needs to be enables in BIOS
3) Home Agent Unit has 2 free counters
4) R2PCI Unit counters need to be chosen.   data transmits to ring counter is not incrementing (should it in testing?)
5) PCU events need to be narrowed down.  These don't seem tricky to program so maybe I'm missing something.
Added post-processing for SNB core counter pickler.  Removed unused arguments from some functions in job_stats.py.  Prolly add post-processing for uncore stuff next.
intel_snb.py will handle post-processing of all core and uncore snb events.  It is general enough to add events easily.  Probably would work for AMD and other intel chip counters as well.
Added vendor and id check for PCI devices.  device labels for pci devices has been changed to socket/device#.
deleted accidental file