Don't need to do the fast vsync for 20 lines (just the first 9)
Slowly simplifying code to make it more efficient/understandable
Moving vsync generation to separate match register
Saving TIM0->IR to variable so we can trigger events during same interrupt later
Stabilized vsync again, now with hsync at the beggining of the 'line'
Combining HSYNC and VSYNC into single MR section.

Looks really stable now!