* MIPS: removed specific handling of 32-bit shifts, generic code does the job just well.
* Tweak 64-bit shifts to take advantage of 3-address instructions (i.e. don't operate on same register).

git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@26142 3ad0048d-3df7-0310-abae-a5850022a9f2