i965/gen7: Skip resetting SOL offsets at batch start with HW contexts.

The software-tracked transform feedback offsets (svbi_0_starting_index)
are incorrect in the presence of primitive restart, so we can't reliably
compute offsets for our buffer pointers after a batch flush.  Thanks to HW
contexts, our transform feedback offsets are now saved, so we can just
keep using the ones from before the batch wrap.

Fixes piglit OpenGL 3.1/primitive-restart-xfb flush
Reviewed-by: Paul Berry <stereotype441@gmail.com>
NOTE: This is a candidate for the 9.1 branch.
i965/gen6: Reduce updates of transform feedback offsets with HW contexts.

The software-tracked transform feedback offsets (svbi_0_starting_index)
are incorrect in the presence of primitive restart, so we were actually
updating it with a bogus value if the batch wrapped and we emitted the
packet again during a single transform feedback.  By reducing state
emission, we avoid the bug.

Fixes piglit OpenGL 3.1/primitive-restart-xfb flush
Reviewed-by: Paul Berry <stereotype441@gmail.com>
NOTE: This is a candidate for the 9.1 branch.
i965/vs: When asked to make a dst_reg for a src.xxxx, just write to src.x.

We have several places in our pull constant handling where we make a
temporary src_reg for an int, and then turn it into a dst.  In doing so,
we were writing to the dst.xyzw, so we never register coalesced it with a
later mov from dst.x to real_dst.x.

These extra channels written would be removed if we had channel-wise DCE
in the backend, but we don't.  Fix it for now by just not writing these
extra channels that won't get used.

Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/vs: Use GRFs for pull constant offsets on gen7.

This allows the computation of the offset to get written directly into the
message source.

shader-db results:
total instructions in shared programs: 3308390 -> 3283025 (-0.77%)
instructions in affected programs:     442998 -> 417633 (-5.73%)

No difference in GLB2.7 low res (n=9).

Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/blorp: Align rectangle primitive for hiz ops

The hardware docs and the simulator require that the rectangle primitive
emitted during fast depth clears and hiz resolves must be aligned to 8x4
pixels.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
intel: Add field intel_mipmap_slice::has_hiz

On Haswell, HiZ will selectively be enabled on individual miptree slices
to workaround a hardware bug. The new field 'has_hiz' indicates if HiZ is
enabled for a given slice.

Also add two new accessor functions for this field.
  intel_miptree_slice_has_hiz
  intel_renderbuffer_has_hiz

The new field and accessor functions are not yet used. Also, this patch
introduces no behavioral change because, in this patch,
intel_miptree_alloc_hiz() sets has_hiz for all slices.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
i965/blorp: Add fields brw_blorp_mip_info::level,layer

The new fields define the 2D miptree slice to be used. A following patch
will pass the new fields through to intel_miptree_slice_has_hiz().

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
i965: Change signature of brw_get_depthstencil_tile_masks()

Add new parameters `depth_level` and `depth_layer`, which specify depth
miptree's slice of interest.  A following patch will pass the new
parameters through to intel_miptree_slice_has_hiz().

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
intel: Replace checks for hiz_mt with intel_has*hiz()

When appropriate, replace each check `hiz_mt != NULL` with either a call
to intel_miptree_slice_has_hiz() or intel_renderbuffer_has_hiz().  No
behavioral change.

This prepares for selectively enabling hiz on individual miptree slices
for Haswell.

This refactoring had several side effects.

  1. To prevent new warnings about discarding the const qualifier,
     I removed 'const' from some variable declarations in
     intel_validate_framebuffer().  The alternative was to add const
     qualifiers to multiple function signatures in the
     intel_renderbuffer_has_hiz call graph. Since the dominant convention
     in the Intel code is to not qualify function parameters as const,
     I chose to remove rather than add const qualifiers.

  2. I changed the signature of brw_emit_depth_stencil_hiz() by replacing
     `struct intel_mipmap_tree *hiz_mt` with `bool hiz`. The function used
     hiz_mt mostly as a boolean indicator of the presence of hiz, so the
     signature change is consistent with the patch's goal.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
i965: Remove brw_context::depthstencil::hiz_mt

After recent refactorings, the field is written but no longer read.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
intel/hsw: Enable hiz (v2)

Enable hiz by setting intel_context::has_hiz.  However, to work around
a hardware bug, we selectively enable hiz for only nicely aligned miptree
slices.

No Piglit regressions on Haswell 0x0d26 rev07 when based atop
mesa-master-4ad3601.

Improves the performance of GLB27_TRex_C24Z16_FixedTimeStep by 18.52%
(hsw-0x0d26-rev07; kernel-3.9.0-rc1; GLBenchmark 2.7.0 Release a68901;
samples=3).

v2: Replace the check for IS_HASWELL(devid) in intel_miptree_slice_has_hiz()
    with a conditional set of has_hiz. [for anholt]

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
gallivm: fix breakc

we break when the mask values are 0 not, 1, plus it's bit comparison
not a floating point comparison. This fixes both.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
gallivm: fix unsigned divide and remainder opcodes

We want to both make sure we never divide by zero to not generate
sigfpe and that divide by zero is guaranteed to return 0xffffffff.
Based on José idea.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
llvmpipe: implement PIPE_QUERY_SO_STATISTICS

We were missing the implementation of PIPE_QUERY_SO_STATISTICS
query, this change implements it on top of the existing
facilities.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
gallivm: fix loops and conditionals within GS

We were using simple temporaries, without using alloca or phi
nodes which meant that on every iteration of the loop our
temporaries, which were holding the number of vertices and
primitives which were emitted, were being reset to zero. Now
we're using alloca to allocate those variables to preserve
them across conditionals.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
gallivm/tgsi: handle untyped moves

both mov and ucmp can be used to move variables of any type.
correctly note that about ucmp in the tgsi_info and make
sure gallivm can handle that by correctly casting the untyped
moves.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
r600g: fix valgrind warning on Cayman

Warning: "Conditional jump or move depends on uninitialised value(s)".
i965/blorp: Remove unnecessary test in gen7_blorp_emit_depth_stencil_config.

gen7_blorp_emit_depth_stencil_config() is only called when
params->depth.mt is non-null.  Therefore, it's not necessary to do an
"if (params->depth.mt)" test inside it.  The presence of this if test
was misleading static analysis tools (and briefly, me) into thinking
that gen7_blorp_emit_depth_stencil_config() might sometimes access
uninitialized data and dereference a null pointer.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
r600g: Add support for GL_ARB_texture_buffer_range

Reviewed-by: Marek Olšák <maraeo@gmail.com>
intel: Move the max_gtt_map_object_size estimation to intel_context.

We need know this in order to decide what tiling mode to use.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>