msm: kgsl: Ensure glitch free changing of the GPU frequency

If there are requests to skip levels while the clocks are on
be sure to hit the intermediate frequencies.

Change-Id: Ib69bcbc7eb87532c090b4ede28d967e4cd0f08ec
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
Signed-off-by: Ranjhith Kalisamy <ranjhith@codeaurora.org>
Signed-off-by: Ramakrishna Prasad N <crpn@codeaurora.org>
msm: kgsl: Make use of the new clock APIs.

Use the split clock APIs to do low latency actions (enable/disable)
frequently.  Use the high latency functions (prepare/unprepare)
sparingly to help performance.

CRs-fixed: 351696
Change-Id: Iaf9ed2117a1647e38be8658c60a365d377c968a4
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
msm: kgsl: Ensure correct enable sequence for 2D core clock

Calling clk_set_rate() for both AXI & 2D core clocks without putting
them in async mode causes 2D core hang. Since AXI & 2D core clocks
are in sync mode, ensure that clk_set_rate() is called only for AXI
& 2D core clock is enabled only after it is prepared.

Change-Id: I4634e2342d62ce16ad7afc748b10b0573fbfd913
CRs-fixed: 385393
Signed-off-by: Ranjhith Kalisamy <ranjhith@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
msm: vidc: Add support for H263 PlusPType flag

Some video players does not support pluptype
flag in H263 video format. This change adds
support in video driver to enable or disable
plusptype flag for H263 format.

CRs-fixed: 420970
Signed-off-by: Shobhit Pandey <cshopan@codeaurora.org>
(cherry picked from commit 8084f4f40b8b6d66d2b5c6a572b4f22c6817d75b)

Conflicts:

	drivers/video/msm/vidc/1080p/ddl/vcd_ddl_properties.c
	include/linux/msm_vidc_enc.h
	include/media/msm/vcd_property.h

Change-Id: Ic4c8c5c3ebbb5208a5adaa96ec92dd8d969a7e83
Signed-off-by: Srivalli Oguri <oguri@codeaurora.org>
Update copyright to The Linux Foundation

Change-Id: I4f0ad1a689965142222e23c3f87a65fa76f4c8a4
Signed-off-by: Duy Truong <dtruong@codeaurora.org>
msm: kgsl: Turn off the CP_DEBUG dynamic clock

The CP dynamic clock seems to be glitchy when the CP clocks are turned
back on after a power event. Turn off said dynamic clock control at
init time. The impact of leaving the dynamic clock control off is
negligible since the CP clock is only on when the CP is actually in
use.

CRs-fixed: 402119
CRs-fixed: 409253
CRs-fixed: 413224
Change-Id: Ic0dedbad783f8b911d9b57d1602d9b3976af1b3b
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Add CP_WAIT_FOR_IDLE packet before updating timestamp

HW workaround to resolve MMU pagefault caused by memory
freeing early before GPU completes it.

This is race condition where timestamp is getting updated
and the event handler runs before the GPU actually got done
with the timestamp, hence freeing the buffer early while GPU
still not completed with it.

Signed-off-by: Anshuman Dani <adani@codeaurora.org>

Conflicts:

	drivers/gpu/msm/adreno_ringbuffer.c
Change-Id: I6d338d7dca680f57f2c39ed5a14381b261bf8bce

Signed-off-by: Vikram Orre <vorre@codeaurora.org>
msm: kgsl: Add cache flush for A20x

Adding extra cache flush command to make sure that CP block
gets event from RB all the time to avoid race conditions because of
clock switches. this is to improve stability on 8x25 target.

Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>

Conflicts:

	drivers/gpu/msm/adreno_ringbuffer.c
Change-Id: Ie411be46fa166864073d35c50085a8f2506d0eb8

Signed-off-by: Vikram Orre <vorre@codeaurora.org>
Merge branch 'ics-3.0_sod' of git://github.com/Christopher83/samsung-kernel-msm7x30 into Christopher83-ics-3.0_sod
ancora: remove pmem_audio (depreciated)