Add a version of sys::ExecuteAndWait that takes StringRefs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183934 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Don't try to fix reg class when copying IMPLICIT_DEF to a register

The test case for this is way too complex to be useful as a lit test,
and I was unable to reduce it.

https://bugs.freedesktop.org/show_bug.cgi?id=65438

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183937 91177308-0d34-0410-b5e6-96231b3b80d8
[PowerPC] Disable fast-isel for existing -O0 tests for PowerPC.

This is a preliminary patch for fast instruction selection on
PowerPC.  Code generation can differ between DAG isel and fast isel.
Existing tests that specify -O0 were written to expect DAG isel.  Make
this explicit by adding -fast-isel=false to the tests.

In some cases specifying -fast-isel=false produces different code even
when there isn't a fast instruction selector specified.  This is
because TM.Options.EnableFastISel = 1 at -O0 whether or not a FastISel
object exists.  Thus disabling fast isel can actually produce less
conservative code.  Because of this, some of the expected code
generation in the -O0 tests needs to be adjusted.

In particular, handling of function arguments is less conservative
with -fast-isel=false (see isOnlyUsedInEntryBlock() in
SelectionDAGBuilder.cpp).  This results in fewer stack accesses and,
in some cases, reduced stack size as uselessly loaded values are no
longer stored back to spill locations in the stack.

No functional change with this patch; test case adjustments only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183939 91177308-0d34-0410-b5e6-96231b3b80d8
Avoid using PathV1.h in Program.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183940 91177308-0d34-0410-b5e6-96231b3b80d8
Don't use PathV1.h in FileUtilities.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183941 91177308-0d34-0410-b5e6-96231b3b80d8
Add a RemoveFileOnSignal that takes a StringRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183943 91177308-0d34-0410-b5e6-96231b3b80d8
Don't use PathV1.h in Signals.h.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183947 91177308-0d34-0410-b5e6-96231b3b80d8
Try to fix the windows build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183950 91177308-0d34-0410-b5e6-96231b3b80d8
[yaml2obj] Initial ELF section support.

The current functionality is extremely basic and a bit rough around the
edges, but it will flesh out in future commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183953 91177308-0d34-0410-b5e6-96231b3b80d8
[yaml2obj] Add sh_addr via `Address` key.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183954 91177308-0d34-0410-b5e6-96231b3b80d8
[yaml2obj] Add support for specifying raw section content.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183955 91177308-0d34-0410-b5e6-96231b3b80d8
#include <climits> instead of <limits.h> in C++ header file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183957 91177308-0d34-0410-b5e6-96231b3b80d8
Remove forward declaration of MachineBasicBlock. It is #included anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183958 91177308-0d34-0410-b5e6-96231b3b80d8
Move #include from .h to .cpp file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183960 91177308-0d34-0410-b5e6-96231b3b80d8
[yaml2obj] Add support for sh_addralign via `AddressAlign` key.

For consistency, change the address in the test case from 0xDEADBEEF to
0xCAFEBABE since 0xCAFEBABE that actually has a 2-byte alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183962 91177308-0d34-0410-b5e6-96231b3b80d8
Enable FastISel on ARM for Linux and NaCl, not MCJIT

This is a resubmit of r182877, which was reverted because it broken
MCJIT tests on ARM. The patch leaves MCJIT on ARM as it was before: only
enabled for iOS. I've CC'ed people from the original review and revert.

FastISel was only enabled for iOS ARM and Thumb2, this patch enables it
for ARM (not Thumb2) on Linux and NaCl, but not MCJIT.

Thumb2 support needs a bit more work, mainly around register class
restrictions.

The patch punts to SelectionDAG when doing TLS relocation on non-Darwin
targets. I will fix this and other FastISel-to-SelectionDAG failures in
a separate patch.

The patch also forces FastISel to retain frame pointers: iOS always
keeps them for backtracking (so emitted code won't change because of
this), but Linux was getting much worse code that was incorrect when
using big frames (such as test-suite's lencod). I'll also fix this in a
later patch, it will probably require a peephole so that FastISel
doesn't rematerialize frame pointers back-to-back.

The test changes are straightforward, similar to:
  http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130513/174279.html
They also add a vararg test that got dropped in that change.

I ran all of lnt test-suite on A15 hardware with --optimize-option=-O0
and all the tests pass. All the tests also pass on x86 make check-all. I
also re-ran the check-all tests that failed on ARM, and they all seem to
pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183966 91177308-0d34-0410-b5e6-96231b3b80d8
Remove unused header.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183968 91177308-0d34-0410-b5e6-96231b3b80d8
X86: cvtpi2ps is just an SSE instruction with MMX operands. It has no AVX equivalent.

Give it the right register format so we can also emit it when AVX is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183971 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: fix thumb coprocessor instruction with pre-writeback disassembly

was        stc2 p0, c0, [r0]!
instead of stc2 p0, c0, [r0,#0]!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183975 91177308-0d34-0410-b5e6-96231b3b80d8