VK1ET : Bugfix in Error correction table

vk1etI believe there is an error in the way the CRC error syndromes are
being created in the two bit case. The inner loop was introducing an
extra error bit each time through rather than moving it. Below is the
modified code fragment for syndrome creation collapsedSun 07:26
19 May 2013 07:26vk1et [notifications@github.com]Actions
To:Mantirez/dump1090 ‎[dump1090@noreply.github.com]‎Cc:MMalcolmRobb
‎[Support@ATTAvionics.com]‎

To help protect your privacy, some content in this message has been
blocked. If you're sure this message is from a trusted sender and you
want to re-enable the blocked features, click here.
Bugfix first noted by VK1ET, and posted here :
https://github.com/antirez/dump1090/pull/23#issuecomment-18113094

I believe there is an error in the way the CRC error syndromes are being
created in the two bit case. The inner loop was introducing an extra
error bit each time through rather than moving it.
VK1ET : Better pthread termination

Close threads, mutex and conditions using pthread functions

Also, correct/update a few comments.
VK1ET: Shorten CRC calculation

We don't need to include the CRC itself one bit at a time. This shortens
the loop count by 24 iterations, so should be much faster
VK1ET : Changes to modesInitError()

Restrict Syndromes to exclude DF bits. Do NOT introduce syndromes for
errors in the first 5 bits (DF field)

Use the --aggressive flag to see if we populate the two-bit error
syndromes. If --aggressive is not specified, then we don't attempt to
fix two bit errors.
VK1ET : Changes to fixBitErrors()

1) Reduce complexity of fixBitErrors()
2) Inline flipBits()
3) Remove validation checks that can never occur.
VK1ET : Check Bit Correction against ICAO cache

If we error correct a DF17 frame, check that the ICAOaddr exists in our
recently seen ICAO cache. This reduces the likelyhood of birthday
paradox solutions producing false ICAO addresses
VK1ET : Use error corrected DF17

Actually use the (DF17) messages where we do bit correction.

Other changes to AVR message I/O.
1) treat mlat timestamp of zero as invalid (easier to work with than
(-1) and equally unlikely).
2) If we don't have a valid timestamp send a without timestamp
'*.......' message rather than '@.......' with invalid time.
3) Drop interpretation of obsolete AVR ' #' & '$' formats - they
wouldn't have worked anyway (wrong length).
Change mm.crc checks to mm.correctedbits

Instead of force clearing mm.crc to zero if we successfully correct bit
errors, just use the mm.correctedbits variable. This allows us to print
out the crc value containing the errors during list output modes.
Decode DF-18
mm structure initialisation

Ideally we should clear down the mm structure every loop of our
ModeA/C/S bit detector. However, we're getting 2Mbits of data per
second, and the structure is several tens of bytes long. Clearing down
every loop would require us to zero up to 100Mb per second. The memset
function may be fast, but it's still going to take up valuable processor
time.

So instead of clearing the whole structure every loop, just clear the
important parts.
Phase Enhancement changes

Phase enhancement is used to try and increase the signal amplitude when
Nyquist sample aliasing is suspected. In previous versions, this was
enabled by default. In this version, the default is off. There is now an
additional command line switch --phase-enhance to turn it on.

There are also additional debug statistics which count the number of
phase demodulation failures in for both uncorrected and phase corrected
passes.
Merge pull request #8 from MalcolmRobb/master

Pulling in from MalcomRobb's Master