WIP: start adding a3xx..
WIP: freedreno: more compiler
WIP: more compiler.. maybe?

Not entirely sure at this point if groups of four instructions are
guaranteed to be dispatched in parallel or not.  If we can't assume this
then in some cases we need a temporary and an extra mov to avoid
overwriting a src register that is still live.

This isn't very clever, it doesn't try to figure out if there is really
a conflict/hazard (ie. "ADD R1.xyzw R1.xyzw R2" is not a problem, but
"ADD R1.xyzw R1.wzyx R2" is).  The thought being that eventually we'll
anyways need an optimzing pass to rename registers and eliminate
unnecessary moves... that seems the easiest way to make in/out/temp
registers have overlapping range.