initial attempt to create a framework for the blade

ATM this is just a directory structure, I will fill it in a bit more
soon. Ideally alot of this stuff can be split off from the blade and
made independant.
add a sys module for stm32f107

Start fleshing out the hal sys module the stm32f107. Currently it will
boot the blade and run the clk at 62.5MHz, and some simple ticks and critcal
section stuff is running.
add/tidy a hal interface

I dont like this but am going to get going for the moment, hal interface
should be at the root of hal, not implimentation specific. Ill sort this
out later though.
add stm32f107 config file

This is needed by the stm libs to define the mcu types and layout a bit.
This is just a very simple default for now.
add a simple sys module unit test

ATM this just checks the system clocks and timing is setup correctly.
@todo test more of the sys module (temperature, locking, etc)
@todo when gpio module is availble make this non HW specific.

I am not sure if all these files are needed in iar atm, so I have added
them anyway. Some might be better in ignore lists or something (I am not
much of a iar expert)?
add results of first sys test

These first run results shows that the system is mostly working as
desired. However there are quite large errors in the timings, ie when
trying to setup for 72MHz the clock appears to run about 2MHz over and
the system clock appears jittery. This may be a hardware issue owing to
noise on the clock lines since they appear to run a long way on the pcb.

This will need further investigation.
add gpio driver to hal

A simple driver to read and write to gpio. This is the first driver
added to hal so a lot of the framework for drivers is going in to like
hw.h/hw.c etc.

Also a simple unit test to check the pins on the micro can be
set/cleared and read successfully, and finally a speed test of the GPIO
(about 580KHz atm) is done.
minor tidy up
get rid of duplication in gpio_t defition

The gpio mask value was already stored in the cfg. This makes it easier
to declare new pins.
remove reduntant info in stm32f107x gpio_t

We can look the rcc apb2 periph for the gpio from the port so we can
remove it from the private definition. This makes it easier to declare
pins.
add a basic hard fault handler

just spin for now so we can dbg
remove st hardware headers from hal interface

The hal interface should only use standard c types, or its own. This
will keep the library easier to work with.
add slave spi module to hal layer

Added the spis (spi slave) module and unit tests. Currently the spi
reads work well, however the writes are hard to get consistent owing to
the double buffering. If testing with something like the nano board with
a MOSI phase, followed by a MISO phase you will see the MOSI data works
fine, however the MISO data can be shifted and get out of sync quite
easily for some reason. This _NEEDS_ more work.

It seems that certain changes (uart enable and sleep) are required to
sys_init() for the spi to function properly, I will look into why this
is in more detail later when I have time (I suspect the clock on the
blade DUT is jittery)
add sys_nop call for debugging

as nop is a system dependant call it from sys module
Do a better check before reading/writing from/to buf

It is not enough to check the buffer is not null, we need to check that
we are doing a read/write and we have not run off the end of the buffer

Also I added a cancel read/write interface
make spis unit test work (only works for fixed bit patterns atm)
increase spin time at startup in sys

lets just spin for longer to remove any doubts
fix spis bugs

look at flags only (not isr enables also) when starting reads and
writes.
Update spis unit tests

there are 3 optional tests (choose at compile time).
TEST1 - check full duplex comms with nano board. (still a little bugy)
TEST2 - test read only (OK)
TEST3 - test write only (OK)
spis_utest ops

change order of functions so it compiles TEST1