* tree-flow.h (struct omp_region): Move to omp-low.c.
	Remove omp_ prototypes and variables.
	* gimple.h (omp_reduction_init): Move prototype to omp-low.h.
	(copy_var_decl): Relocate prototype from tree-flow.h.
	* gimple.c (copy_var_decl): Relocate from omp-low.c.
	* tree.h: Move prototype to omp-low.h.
	* omp-low.h: New File.  Relocate prototypes here.
	* omp-low.c (struct omp_region): Make local here.
	(root_omp_region): Make static.
	(copy_var_decl) Move to gimple.c.
	(new_omp_region): Make static.
	(make_gimple_omp_edges): New.  Refactored from tree-cfg.c make_edges.
	* tree-cfg.c: Include omp-low.h.
	(make_edges): Factor out OMP specific bits to make_gimple_omp_edges.
	* gimplify.c: Include omp-low.h.
	* tree-parloops.c: Likewise.

	c
	* c-parser.c: Include omp-low.h.
	* c-typeck.c: Likewise.

	cp
	* parser.c: Include omp-low.h.
	* semantics.c: Likewise.

	fortran
	* trans-openmp.c: Include omp-low.h.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203786 138bc75d-0d04-0410-961f-82ee72b054a4
	* config/i386/sse.md (*vec_widen_smult_even_v8si): Remove
	isa attribute.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203787 138bc75d-0d04-0410-961f-82ee72b054a4
syscall: Add Dup3, {Get,List,Remove,Set}xattr, {Get,Set}priority.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203788 138bc75d-0d04-0410-961f-82ee72b054a4
2013-10-07  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
	fields to the reg_addr array that describes the valid addressing
	mode for any register, general purpose registers, floating point
	registers, and Altivec registers.
	(FIRST_RELOAD_REG_CLASS): Likewise.
	(LAST_RELOAD_REG_CLASS): Likewise.
	(struct reload_reg_map_type): Likewise.
	(reload_reg_map_type): Likewise.
	(RELOAD_REG_VALID): Likewise.
	(RELOAD_REG_MULTIPLE): Likewise.
	(RELOAD_REG_INDEXED): Likewise.
	(RELOAD_REG_OFFSET): Likewise.
	(RELOAD_REG_PRE_INCDEC): Likewise.
	(RELOAD_REG_PRE_MODIFY): Likewise.
	(reg_addr): Likewise.
	(mode_supports_pre_incdec_p): New helper functions to say whether
	a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
	(mode_supports_pre_modify_p): Likewise.
	(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
	print the valid address mode bits for each mode.
	(rs6000_debug_print_mode): Likewise.
	(rs6000_debug_reg_global): Likewise.
	(rs6000_setup_reg_addr_masks): New function to set up the address
	mask bits for each type.
	(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
	Call rs6000_setup_reg_addr_masks to set up the address mask bits.
	(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
	mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
	PRE_MODIFY are supported.
	(rs6000_print_options_internal): Tweak the debug output slightly.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203790 138bc75d-0d04-0410-961f-82ee72b054a4
2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
	fields to the reg_addr array that describes the valid addressing
	mode for any register, general purpose registers, floating point
	registers, and Altivec registers.
	(FIRST_RELOAD_REG_CLASS): Likewise.
	(LAST_RELOAD_REG_CLASS): Likewise.
	(struct reload_reg_map_type): Likewise.
	(reload_reg_map_type): Likewise.
	(RELOAD_REG_VALID): Likewise.
	(RELOAD_REG_MULTIPLE): Likewise.
	(RELOAD_REG_INDEXED): Likewise.
	(RELOAD_REG_OFFSET): Likewise.
	(RELOAD_REG_PRE_INCDEC): Likewise.
	(RELOAD_REG_PRE_MODIFY): Likewise.
	(reg_addr): Likewise.
	(mode_supports_pre_incdec_p): New helper functions to say whether
	a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
	(mode_supports_pre_modify_p): Likewise.
	(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
	print the valid address mode bits for each mode.
	(rs6000_debug_print_mode): Likewise.
	(rs6000_debug_reg_global): Likewise.
	(rs6000_setup_reg_addr_masks): New function to set up the address
	mask bits for each type.
	(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
	Call rs6000_setup_reg_addr_masks to set up the address mask bits.
	(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
	mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
	PRE_MODIFY are supported.
	(rs6000_output_move_128bit): Change to use {src,dest}_vmx_p for altivec
	registers, instead of {src,dest}_av_p.
	(rs6000_print_options_internal): Tweak the debug output slightly.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203791 138bc75d-0d04-0410-961f-82ee72b054a4
compiler: Rework handling of imported anonymous builtin types again.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203795 138bc75d-0d04-0410-961f-82ee72b054a4
Fix typo in ChangeLog

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203797 138bc75d-0d04-0410-961f-82ee72b054a4
2013-10-17  Tim Shen  <timshen91@gmail.com>

	* include/bits/regex.h (regex_token_iterator<>::regex_token_iterator):
	Fix initialization orders in initialization list and add explicit braces
	for potentially ambiguous(actually not) `else` branch to eliminate
	warnings.
	* include/bits/regex_automaton.h (_NFA<>::_NFA): Likewise.
	* include/bits/regex_compiler.h (_CharMatcher<>::_CharMatcher,
	_BracketMatcher<>::_BracketMatcher): Likewise.
	* include/bits/regex_compiler.tcc (_Compiler<>::_Compiler,
	_Compiler<>::_M_atom): Likewise.
	* include/bits/regex_executor.h (_Executor<>::_Executor): Likewise.
	* include/bits/regex_executor.tcc (_DFSExecutor<>::_M_dfs,
	_Executor<>::_M_word_boundry): Likewise.
	* include/bits/regex_scanner.tcc (_Scanner<>::_Scanner,
	_Scanner<>::_M_eat_class): Likewise.
	* include/bits/regex.tcc (__regex_algo_impl<>,
	regex_iterator<>::operator++): Likewise, and remove unused typedef.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203798 138bc75d-0d04-0410-961f-82ee72b054a4
2013-10-17  Charles Bayis  <charles.baylis@linaro.org>

	* gcc.dg/builtin-apply2.c: Skip test on arm hardfloat ABI targets.
	* gcc.dg/tls/pr42894.c: Remove dg-options for arm*-*-* targets.
	* gcc.target/arm/thumb-ltu.c: Remove dg-skip-if and require
	effective target arm_thumb1_ok.
	* lib/target-supports.exp
	(check_effective_target_arm_fp16_ok_nocache): Don't force
	-mfloat-abi=soft when building for hardfloat target.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203799 138bc75d-0d04-0410-961f-82ee72b054a4
2013-10-03  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p8vector-fp.c: New test for floating point
	scalar operations when using -mupper-regs-sf and -mupper-regs-df.
	* gcc.target/powerpc/ppc-target-1.c: Update tests to allow either
	VSX scalar operations or the traditional floating point form of
	the instruction.
	* gcc.target/powerpc/ppc-target-2.c: Likewise.
	* gcc.target/powerpc/recip-3.c: Likewise.
	* gcc.target/powerpc/recip-5.c: Likewise.
	* gcc.target/powerpc/pr72747.c: Likewise.
	* gcc.target/powerpc/vsx-builtin-3.c: Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203800 138bc75d-0d04-0410-961f-82ee72b054a4