msm: display: provide mdp bandwidth parameters from board file

Underrun issues can be solved by changing mdp bandwidth parameters:
max_bw, ab_factor and ib_factor. However these parameters are not
universally same for all targets, and one set of values that works for
one target could cause underruns or higher power on other
targets. This is board side change.

CRs-Fixed: 464492
Change-Id: I2a8fbb9018011ddf42dfa50b371e450e38f4351a
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm: Support speed push 450Mhz for adreno A320 on 8064ab chip.

The 8064ab chip has adreno 320, which supports 450Mhz.
This patch adds support for it.

Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
(cherry picked from commit 7710ee861261f06fc66173f97db81033e2a7b2c9)

Change-Id: Ibcc344b8f4de55040ed9fa28c4ce7fab97d3a147
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
msm: kgsl: Add the GPU chip ID for the 8064v2 SoC.

Detect the 8064v2 silicon and pass the correct chip ID to KGSL so it
can in turn pass it to the user mode driver to take advantages of
new features and fixes in this silicon revision.

Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
(cherry picked from commit 1e52ca565ea24c4bbe939924b30c535a97c4e4c1)

Change-Id: I37608d8ba912f71754fa84c73dae6211b45b890a
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
msm: kgsl: Enable GPU to use multiple IOMMU devices

Set the defualt IOMMU count to two for the GPU.
If the device is 8960 (ie not 8960PRO), set the IOMMU
count to one and let kgsl take care of initializing only
one IOMMU device.

Change-Id: I736a6d6744c4359ec5cc923d6eddd652451c81a1
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: kgsl: Replace 325Mhz with 320 Mhz for 8064 and 8960PRO

325Mhz will not be supported anymore and has to be replaced
with 320Mhz.

Change-Id: Ibdb678215749d0e57b66e6e6416c5cb978b45b66
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
arm: dma: Expand the page protection attributes

Currently, the decision on which page protection to use
is limited to writecombine and coherent. Expand to include
strongly ordered memory and non consistent memory.

Change-Id: I7585fe3ce804cf321a5585c3d93deb7a7c95045c
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
arm: dma: Allow CMA pages to not have a kernel mapping.

Currently, there are use cases where not having any kernel
mapping is required; if the CMA memory needs to be used as
a pool which can have both cached and uncached mappings we
need to remove the mapping to avoid the multiple mapping
problem. Extend the dma APIs to use the DMA_ATTR_NO_KERNEL_MAPPING
with CMA. This doesn't end up saving any virtual address space
but the mapping will still not be present.

Change-Id: I64d21250abbe615c43e2b5b1272ee2b6d106705a
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
ARM: mm: fix MMU mapping of CMA regions

Fix dma_contiguous_remap() so that it continues through all the
regions, even after encountering one that is outside lowmem.
Without this change, if you have two CMA regions, the first outside
lowmem and the seocnd inside lowmem, only the second one will get
set up in the MMU. Data written to that region then doesn't get
automatically flushed from the cache into memory.

Change-Id: I941c46baa951cb2a2c7aa151779fb48a4a488a74
CRs-Fixed: 467034
Signed-off-by: Chris Brand <cbrand@broadcom.com>
[extended patch subject with 'fix' word]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
ARM: dma-mapping: add support for CMA regions placed in highmem zone

This patch adds missing pieces to correctly support memory pages served
from CMA regions placed in high memory zones. Please note that the default
global CMA area is still put into lowmem and is limited by optional
architecture specific DMA zone. One can however put device specific CMA
regions in high memory zone to reduce lowmem usage.

Change-Id: I92ae4a772f24e0ca90c5560a826207850618b506
CRs-Fixed: 467034
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[lauraa@codeaurora.org: Context fixups]
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
ARM: dma-mapping: Allow highmem pages to not have a mapping

The DMA_ATTR_NO_KERNEL_MAPPING is used to make sure that CMA
pages have no kernel mapping. Add support to make sure that
highmem pages have no mapping.

Change-Id: Ife76df126ecfedf0dba81a35e0de8a1787355b3d
CRs-Fixed: 467034
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
ARM: 7363/1: DEBUG_LL: limit early mapping to the minimum

cherry-picking from kernel v3.5

There is just no point mapping up to 512MB for a serial port.
Using a single 1MB entry is way sufficient for all users.
This will create less interference for the following debugging patch.

Change-Id: Ifc06ec5dbf1c1f25053adb08b9d0a3dccfe46f3e
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>