usb: ehci-omap: reimplement workaround for errata i693

The OMAP4 EHCI controller has the following defect (errata ID i693):

Title:
	USB HOST EHCI - Port Resume Fails On Second Resume Iteration

Description:
	When entering USB suspend mode, the EHCI will automatically
	ask the PHY to enter low power mode (PHY function control
	register bit suspendM is reset).
	The PHY will then cut the ULPI_CLK after a minimum of 5
	clock cycles.(no maximum specified). On the other hand,
	the EHCI embeds a counter counting up to 18 before cutting
	the internal clock after suspend signal is asserted. Since
	the PHY cuts the clock prematurely, the counter is not
	reaching 18. However, the first suspend and resume will work
	correctly. At the second suspend sequence, since the counter
	has maintained the value (thanks to retention flops),
	the counter reaches 18 and cuts the clock internally.
	As a consequence, the internal state machine does not
	transition to the correct state causing the next resume to fail.
	Both host initiated resume and remote wakeup are impacted
	by this issue.

Workaround
	After setting the suspend bit, switch the internal clock
	supply from the external ULPI_CLK provided by the PHY to
	the internal 60 MHz clock. This will allow the internal
	counter to reach 18. Then after 1ms, switch back to
	the external ULPI_CLK. This switch can be done thanks
	to the CM_L3INIT_HSUSBHOST_CLKCTRL[25:24]:CLKSEL_UTMI_P1/2 bits.
	During the application of the WA, the
	CM_L3INIT_HSUSBHOST_CLKCTRL[9:8]OPTFCLKEN_UTMI_P1/2_CLK
	optional clocks need to be enabled.

All OMAP4430 devices are impacted.

Change-Id: Ifb127cf86a8aeaa10a996403cf8f4e2a68d1ab23
Signed-off-by: Ruslan Bilovol <ruslan.bilovol@ti.com>