mm: add a field to store names for private anonymous memory

Userspace processes often have multiple allocators that each do
anonymous mmaps to get memory.  When examining memory usage of
individual processes or systems as a whole, it is useful to be
able to break down the various heaps that were allocated by
each layer and examine their size, RSS, and physical memory
usage.

This patch adds a user pointer to the shared union in
vm_area_struct that points to a null terminated string inside
the user process containing a name for the vma.  vmas that
point to the same address will be merged, but vmas that
point to equivalent strings at different addresses will
not be merged.

Userspace can set the name for a region of memory by calling
prctl(PR_SET_VMA, PR_SET_VMA_ANON_NAME, start, len, (unsigned long)name);
Setting the name to NULL clears it.

The names of named anonymous vmas are shown in /proc/pid/maps
as [anon:<name>] and in /proc/pid/smaps in a new "Name" field
that is only present for named vmas.  If the userspace pointer
is no longer valid all or part of the name will be replaced
with "<fault>".

The idea to store a userspace pointer to reduce the complexity
within mm (at the expense of the complexity of reading
/proc/pid/mem) came from Dave Hansen.  This results in no
runtime overhead in the mm subsystem other than comparing
the anon_name pointers when considering vma merging.  The pointer
is stored in a union with fieds that are only used on file-backed
mappings, so it does not increase memory usage.

Change-Id: Ie2ffc0967d4ffe7ee4c70781313c7b00cf7e3092
Signed-off-by: Colin Cross <ccross@android.com>
slub: tid must be retrieved from the percpu area of the current processor

As Steven Rostedt has pointer out: rescheduling could occur on a
different processor after the determination of the per cpu pointer and
before the tid is retrieved. This could result in allocation from the
wrong node in slab_alloc().

The effect is much more severe in slab_free() where we could free to the
freelist of the wrong page.

The window for something like that occurring is pretty small but it is
possible.

Signed-off-by: Christoph Lameter <cl@linux.com>
Signed-off-by: Pekka Enberg <penberg@kernel.org>
mm: pass readahead info down to the i/o scheduler

Some i/o schedulers (i.e. row-iosched, cfq-iosched) deploy an idling
algorithm in order to be better synced with the readahead algorithm.
Idling is a prediction algorithm for incoming read requests.

In this patch we mark pages which are part of a readahead window, by
setting a newly introduced flag. With this flag, the i/o scheduler can
identify a request which is associated with a readahead page. This
enables the i/o scheduler's idling mechanism to be en-sync with the
readahead mechanism and, in turn, can increase read throughput.

Change-Id: I0654f23315b6d19d71bcc9cc029c6b281a44b196
Signed-off-by: Lee Susman <lsusman@codeaurora.org>
msm: ADSPRPC: Allow mapping of IOMMU heap buffers

Map / unmap the IOMMU heap buffers based on SMMU presence so as
to allow for these buffers to be passed to the remote processor
with zero-copy.

Change-Id: I95b3bdd46a8fa6eb3bca660a3900b5d690c12617
Acked-by: Sathish Ambley <sambley@qti.qualcomm.com>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
msm: cpufreq: Only apply driver limits for scaling_min/max_freq writes

When new values are written to scaling_min/max_freq sysfs files, the
current code applies all the limits imposed by various ADJUST and
INCOMPATIBLE notifiers handlers before storing them.

When the ADJUST and/or INCOMPATIBLE notifiers change their limits
frequently, this behavior makes it almost impossible for a
user/userspace process to store the scaling_min/max_freq limits
that go beyond the instantaneous limits imposed by the notifiers.
Since these sysfs nodes are typically meant to set limits that need
to be enforced for the foreseeable future, this is not a very user
friendly behavior.

So, change the behavior to only apply limits that are enforced by
the cpufreq driver. Typically, these are just the absolute limits
of the HW and don't change very often.

Change-Id: I1ccfaa2d1ee4ea595f882485d359dbdb407a0176
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
msm: mdss: refactor performance calculations

Current logic could potentially lead to drop in performance (and
underflow) when multiple panels are there and both are updating mixer
configuration independently, as we may end up raising bus bandwidth for
another panel which may not be ready just yet, this is addressed by
updating performance configuration values until it's ready to switch
rather than updating values and performing these later (other panel
update could come in between).

Change-Id: Ib5077ecfd9390f67157067cb6c06106cb896868f
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
msm: mdss: account for peak bandwidth due to SMP fetch

At beginning of vsync, all pipes can start fetching at the same time in
order to fill their allocated SMP blocks, which is usually only enough
to hold first few lines of the layer. Account for this behavior and
ensure that there is enough bandwidth to fill these in the blanking
period.

Change-Id: Ic23e31813fe67958f741d52ab504ed683d23dd45
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
msm: mdss: add back bus factors for bandwidth calculations

Bus factors are needed to account for how system behaves. AB factors is
needed due to the way bus driver is calculating the bandwidth by
dividing it across 2x ports. IB factor is needed to account for DDR
inefficiency and get the correct throughput.

Change-Id: Iccf83dd25615de489d8e986c38a6d2e9175a965c
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
msm: mdss: push wait for fences and ping pong done as late as possible

All the configuration up until MDP flush is double buffered. This means
we are able to do all hardware programming without settings taking
effect until flush happens. Perform all programming, wait for fences
and wait for previous frame is done just before the flush in order to
reduce the time between last frame done and kickoff of next one.

Change-Id: I1fd0c7a65309a3b148c8efef61819bfe9a248f29
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
msm: kgsl: Save/restore performance counters across GPU power collapse

Physical performance counters are reset on GPU power collapse.
Save the values of the performance counters when the GPU goes to
power collapse and restore them on restart.

Change-Id: I63bec7b20e7fe516bbac4901cac0af3a1c1f4959
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
msm: kgsl: Protect against a potential overflow in kgsl_sg_alloc

Avoid allocating a scatterlist so large that it overflows the size
passed to the memory allocators.

CRs-fixed: 564448
Change-Id: Ic0dedbad2ab421ddec8f3be38d61c9bdf9ae5bd4
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Add TSE performance counter to software hang detection

Our current hang detection logic covers rendering pass by checking for
shader performance counters but it does not cover the case where there
is long binning or resolve pass. For long binning pass shader is inactive
making our current hang detection logic faulty. Checking for TSE number of
input primitives covers binning and resolve passes and makes our hang
detection logic robust.

CRs-fixed: 521284
Change-Id: Ifdec4b53685903456feb367f64380119b1485408
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
msm: kgsl: Get reference to process private when attaching mem entry

When a memory entry is attached with to a process private list then
increment the refcount of the process private structure so that the
structure is valid as long as the entry is around. The context
structure is also handled in similar manner. Also, the refcount to
the entry needs to be decremented when the handle that created the
entry goes away and not when the process private structure is
destroyed.

Change-Id: I225698ad4081947a93eb553104e5259bbf31f293
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
msm: kgsl: Allow GPU start to run in a high priority queue

The GPU start sequence needs to run with low latency when coming
out of slumber for the first draw command. For those cases allow the
start function to be queued into a high priority workqueue to reduce
the chance of it getting scheduled out.

Change-Id: Ic0dedbada7ef4d63b54e826862fbefdfb71a092a
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Add an input handler to power up the GPU on a touch event

On a device where the primary input is a touchscreen nobody is
surprised that touch events are often the catalyst for drawing
frames. If the GPU is in slumber we can get a jump on the action
by watching for touch events and turning the GPU on in anticipation
of a draw call. Register for events from all input drivers
returning EV_ABS events and queue a work task to power up the GPU
if it is currently in slumber.

Change-Id: Ic0dedbadbdc96ef9ddd78252ea65f8e1cdd00110
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>

Conflicts:
	drivers/gpu/msm/adreno_ringbuffer.c