When destination parameter is missing, exit with a clear synopsis,
instead of writing to kernel and printing EINVAL description.

PR:		bin/181532
Submitted by:	Kurt Jaeger <fbsd-pr opsec.eu>
Approved by:	re (hrs)
Add channel survey support to the AR5212 HAL.

The AR5212 series of MACs implement the same channel counters as the
later 11n chips - except, of course, the 11n specific counter (extension
channel busy.)

This allows users of these NICs to use 'athsurvey' to see how busy their
current channel is.

Tested:

* AR5212, AR2413 NICs, STA mode

Approved by:	re@ (gleb)
Initialize and free the DTrace taskqueue in the dtrace module load/unload
handlers rather than in the dtrace device open/close methods. The current
approach can cause a panic if the device is closed which the taskqueue
thread is active, or if a kernel module containing a provider is unloaded
while retained enablings are present and the dtrace device isn't opened.

Submitted by:	gibbs (original version)
Reviewed by:	gibbs
Approved by:	re (glebius)
MFC after:	2 weeks
Add driver-assisted striping for upcoming Intel NVMe controllers that can
benefit from it.

Sponsored by:	Intel
Reviewed by:	kib (earlier version), carl
Approved by:	re (hrs)
MFC after:	1 week
Extend some 32-bit fields and variables to 64-bit to prevent overflow
when calculating stats in nvmecontrol perftest.

Sponsored by:	Intel
Reported by:	Joe Golio <joseph.golio@emc.com>
Reviewed by:	carl
Approved by:	re (hrs)
MFC after:	1 week
Do not enable temperature threshold as an asynchronous event notification
on NVMe controllers that do not support it.

Sponsored by:	Intel
Reviewed by:	carl
Approved by:	re (hrs)
MFC after:	1 week
Log and then disable asynchronous notification of persistent events after
they occur.

This prevents repeated notifications of the same event.

Status of these events may be viewed at any time by viewing the
SMART/Health Info Page using nvmecontrol, whether or not asynchronous
events notifications for those events are enabled.  This log page can
be viewed using:

    nvmecontrol logpage -p 2 <ctrlr id>

Future enhancements may re-enable these notifications on a periodic basis
so that if the notified condition persists, it will continue to be logged.

Sponsored by:	Intel
Reviewed by:	carl
Approved by:	re (hrs)
MFC after:	1 week
Do not leak resources during attach if nvme_ctrlr_construct() or the initial
controller resets fail.

Sponsored by:	Intel
Reviewed by:	carl
Approved by:	re (hrs)
MFC after:	1 week
Change the behavior of bhyve such that the gdb listening port is opt-in
rather than opt-out.

Prior to this change if the "-g" option was not specified then a listening
socket for tunneling gdb packets would be opened at port 6466. If a second
virtual machine is fired up, also without the "-g" option, then that would
fail because there is already a listener on port 6466.

After this change if a gdb tunnel port needs to be created it needs to be
explicitly specified with a "-g <portnum>" command line option.

Reviewed by:	grehan@
Approved by:	re@ (blanket)
Now our binutils's assembler supports the Intel Random Number Generator
extensions, we can change the .byte directives in sys/dev/random/ivy.c
to plain 'rdrand' mnemonics.  This already worked for clang users, but
now it will also work for gcc users.

Approved by:	re (kib)
Approved by:	so (des)
MFC after:	1 week
After r256062, the static function fbsdrun_get_next_cpu() in
usr.sbin/bhyve/bhyverun.c is no longer used, so remove it to silence a
gcc warning.

Approved by:	re (glebius)
Properly fix out of memory handling in the iSCSI target.

Approved by:	re (glebius)
Sponsored by:	FreeBSD Foundation
In usr.sbin/bhyve/pci_ahci.c, fix several gcc warnings of the form
"assignment makes pointer from integer without a cast", by changing the
cmd_lst and rbis members of struct ahci_port from integers to pointers.

Also surround a pow-of-2 test expression with parentheses to clarify it,
and avoid another gcc warning.

Approved by:	re (glebius)
Reviewed by:	grehan, mav
In sys/amd64/amd64/pmap.c, fix several gcc warnings about uninitialized
variables in reclaim_pv_chunk().

Approved by:	re (marius)
Reviewed by:	neel, kib
X-MFC-With:	r256072
Remove mention of [fixed] known issue not-specific to updating.
Vendor update to [c]dialog-1.2-20130925 has fixed known problems.
Vendor update SVN revisions: 255917-255917, 255852, and 255958.

Reviewed by:	gjb
Approved by:	re (gjb)
Fix the LINT build.

Approved by:	re (implicit)
MFC after:	1 week
Add two new MIPS CPU families - mips24k and mips74k.

They're both different cores:

* mips24k is an 8-stage pipeline, mips32r1 ABI, non-superscalar core.
* mips74k is a dual-issue 15-stage superscalar design, mips32r2 ABI.

They have different sets of quirks and bugs; these #define entries
will be used to work around these.

Now, strictly speaking, we should have CPU ABI families (mips32r1, mips32r2,
etc) and CPU core types (mips4k, mips24k, mips74k, etc.)  But this is the
starting point of that particular tidy-up.

Reviewed by:	imp@
Approved by:	re@ (gjb)
Shuffle the includes around so they occur after opt_global.h is included;
this way the CPU ABI / core #define items are there.

Reviewed by:	imp@
Approved by:	re@ (gjb)
Add "better" MIPS24k and MIPS74k barriers.

* the mips74k cores only need EHB (which is 'sll $0, $0, 3')
  here; NOPs don't actually work.

* add EHB as the last NOP for the default barriers/hazards;
  that is "better" behaviour and should work on a wider
  variety of processors.

This allows the existing (icky) TLB code to work, allowing
the AR9344 SoC (mips74k) to actually get through kernel startup.

Tested:

* AR9344 SoC - (mips74k)
* AR9331 SoC - (mips24k)

TODO:

* test on mips4k CPUs, just to be sure.

* document that sll $0, $0, 3 is actually "EHB" and that it
  falls back to being a NOP for pre-mips32r1.

* mips24k has an errata that we currently don't correctly explicitly
  state - ie, that after DERET/ERET, the only valid instruction is
  a NOP.

Reviewed by:	imp@
Approved by:	re@ (gjb)
Mark AR934x based boards to be mips74k.

Reviewed by:	imp@
Approved by:	re@ (gjb)