omap_hwspinlock: somewhat reduces sparse warning

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
omap: mailbox: fix sparse warnings

The following sparse warnings have been fixed:

arch/arm/mach-omap2/mailbox.c:295:18: warning: symbol 'mbox_dsp_info' was not declared. Should it be static?
arch/arm/mach-omap2/mailbox.c:303:18: warning: symbol 'omap3_mboxes' was not declared. Should it be static?
arch/arm/mach-omap2/mailbox.c:333:18: warning: symbol 'omap2_mboxes' was not declared. Should it be static?
arch/arm/mach-omap2/mailbox.c:361:18: warning: symbol 'mbox_1_info' was not declared. Should it be static?
arch/arm/mach-omap2/mailbox.c:384:18: warning: symbol 'mbox_2_info' was not declared. Should it be static?
arch/arm/mach-omap2/mailbox.c:390:18: warning: symbol 'omap4_mboxes' was not declared. Should it be static?

Signed-off-by: Suman Anna <s-anna@ti.com>
omap: mailbox: fix NULL nb in omap_mbox_put

omap_mbox_put must check nb for NULL before trying to unregister it

Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com>
Signed-off-by: Iliyan Malchev <malchev@google.com>
omap: mailbox: call request_irq after mbox queues are allocated

Calling request_irq first could provoke that ISR function is executed
before the mbox queues are allocated causing a kernel panic when they are
dereference inside the ISR.

Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com>
omap: mailbox: check iomem resource before dereferencing it

Add a NULL check for iomem resource in mailbox probe functions

Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com>
ARM: OMAP: iommu-added cache flushing operation for L2 cache

Signed-off-by: Ramesh Gupta <grgupta@ti.com>
Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
ARM: OMAP: iommu-dmm fixes

This fixes the following:
  1. pgd and pte entries weren't getting flushed out leading to MMU faults.
  2. Cache invalidate was setting wrong size parameter to
     memory_regain_ownership leading cache invalidate function to fail.

Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com>
iommu/omap: disable mmu interrupts after the first fault

Signed-off-by: Guzman Lugo, Fernando <fernando.lugo@ti.com>
iommu/omap: fix checkpatch warnings in omap iommu code

This patch fixes the checkpatch warnings in omap iommu
code related to broken strings.

Signed-off-by: Suman Anna <s-anna@ti.com>
ARM: OMAP3/4: iommu: migrate to hwmod framework

Use hwmod data and device attributes to build and register an
omap device for iommu driver.

 - Update the naming convention in isp module.
 - Remove unneeded check for number of resources, as this is now
   handled by omap_device and prevents driver from loading.
 - Now unused, remove platform device and resource data, handling
   of sysconfig register for softreset purposes, use default
   latency structure.
 - Use hwmod API for reset handling.

Signed-off-by: Omar Ramirez Luna <omar.luna@linaro.org>
ARM: OMAP3/4: iommu: adapt to runtime pm

Use runtime PM functionality interfaced with hwmod enable/idle
functions, to replace direct clock operations and sysconfig
handling.

Dues to reset sequence, pm_runtime_put_sync must be used, to avoid
possible operations with the module under reset.

Signed-off-by: Omar Ramirez Luna <omar.luna@linaro.org>
ARM: OMAP: iommu: pm runtime save and restore context

Save and restore context during pm runtime transitions.

For now, the previous API for this purpose will trigger
pm runtime functions, and will be left as exported symbol
for compatibility with it's only user.

Signed-off-by: Omar Ramirez Luna <omar.luna@linaro.org>
ARM: OMAP: iommu: optimize save and restore routines

These functions save and restore registers irrespectively of their
read or write permissions, this ends up in registers being saved
that can't be restored because of read only attributes. OTOH, so
far only 3 of them need to be saved.

In future GP_REG (which is present only on OMAP4 ipu) needs to be
saved but right now there is no API that can alter its value. Also,
protected TLB entries must be saved but this can be in a separate
patch as the original code didn't implement the loop to traverse
protected TLB entries.

Signed-off-by: Omar Ramirez Luna <omar.luna@linaro.org>
omap: iommu: deny clkdm idle when iommu fault is not handle until shutdown

When and iommu fault happen and it could not be handled (that means a
valid physical address could not be found) we cannot ack the status bit
of the interrupt. Therefore, we need to deny clkdm idle for the clock of
the iommu until the ack can be done. Otherwise, if there is no
clkdm activity (that can happen if the processor associated with the
processor is put under reset) the clkdm will try to go to idle and it will
fail and get stuck in transition state because of the pending interrupt.
In order to avoid that scenario we deny idle in the mmufault ISR and then
in the shutdown of the iommu we ack the interrupt and then allow idle
again.

Also, for omap4 and omap5 the IPU and DSP processors have a shared MMU
which try to use the iommu again once it is acked even if the processor
is already under reset. For that reason the shared MMU must be reset.
The shared MMU only has hardreset and it is shared with the iommu, for
that reason we need to do a hardreset en the iommuu device. In order
to accomplish that we use hwmod functions.

Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com>
Signed-off-by: Subramaniam Chanderashekarapuram <subramaniam.ca@ti.com>
omap: iommu: enable bus-error back response to remoteproc

The OMAP remoteproc MMUs can give out the fault address as well
as the PC value that caused the fault. This feature is not
available on ARM cores, and instead the value is retrieved
using a bus-error response back to the remote processor.

This functionality is programmable through the MMU_GP_REG
register (only defined for IPU).  The cores are simply
stalled if the MMU_GP_REG.BUS_ERR_BACK_EN bit is not set.
When set, a bus-error exception is raised allowing the
processor to handle it as a bus fault and print the
exception context.

Signed-off-by: Wajahat Khan <w-khan@ti.com>
Signed-off-by: Shahid Akhtar <sakhtar@ti.com>
Signed-off-by: Subramaniam Chanderashekarapuram <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
ARM: OMAP: omap_device: add omap_device_shutdown_hwmods function

Adding omap_device_shutdown_hwmods so that, it can be used as a
deactivate function for the devices which share the clocks
and needs to be turned on independently as iva sequencers or
each core of the ipu

Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com>
ARM: OMAP4: add device_pm_latency for iva

The default latency functions does not work for iva sequencers, they
need to be under reset until the IVAHD load some valid code. So, we
are calling hwmod shutdown when they are deactivated.

Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com>
Signed-off-by: Subramaniam Chanderashekarapuram <subramaniam.ca@ti.com>
ARM: OMAP: clock: create followparent_set_rate function

The followparent_set_rate function can be used by dummy clocks as
their .set_rate function to allow the children of the dummy clocks
to set a rate on the dummy clocks using a call like
    clk_set_rate(clk->parent, rate);

The dummy clocks usually are created as a child of a real clock, and
do not have the capability to set their own rate. Any rate that needs
to be set on the dummy clock has to be set on the dummy clock's
parent. This functionality is implemented by the followparent_set_rate
function by setting the rate on the requested clock's parent clock and
propagating the rate to all the parent's children.

This function allows a clk_set_rate(clk->parent, rate) call to
support both the following clock hierarchies:

   1)  x----- parent_clk
	      |
	      x-----clk;

   2)  x----- parent_clk
	      |
	      x-----parent_dummy_clk;
		    |
		    x--- clk;

This patch is based on the original idea from Nishant Menon.

Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Fernando Guzman Lugo <fernando.lugo@ti.com>
[s-anna@ti.com: Revised function and patch descriptions]
Signed-off-by: Suman Anna <s-anna@ti.com>
ARM: OMAP4: hwmod data: ipu and dsp to use parent clocks instead of leaf clocks

This prevents hwmod _enable_clocks...omap2_dflt_clk_enable path
from enabling modulemode inside CLKCTRL using its clk->enable_reg
field. Instead is left to _omap4_enable_module though soc_ops, as
the one in charge of this setting.

According to comments received[1] for related patches the idea is
to get rid of leaf clocks in future. So remove these two while at it.

[1] http://lkml.org/lkml/2012/8/20/226

Signed-off-by: Omar Ramirez Luna <omar.luna@linaro.org>
ARM: OMAP4: hwmod: add bus-error back flag to iommu attributes

The bus-error back response flag information has been added to
the iommu device attributes for DSP and IPU processors on OMAP4.

The flag is not relevant for dsp, and has been therefore set to 0.

Signed-off-by: Subramaniam Chanderashekarapuram <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>