linux-user: Use memcpy in get_user/put_user.

When host and target have differing alignment rules, using a cast
and direct memory operation can result in SIGBUS.  Use memcpy instead,
which the compiler will happily optimize when alignment is satisfied.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
tcg-sparc: Hack in qemu_ld/st64 for 32-bit.

Not actually implemented, but at least we avoid the tcg assert at startup.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Fix ADDX opcode.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Don't MAP_FIXED on top of the program

The address we pick in sparc64.ld is also 0x60000000, so doing a fixed map
on top of that is guaranteed to blow up.  Choosing 0x40000000 is exactly
right for the max of code_gen_buffer_size set below.

No need to ever use MAP_FIXED.  While getting our desired address helps
optimize the generated code, we won't fail if we don't get it.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode.

Current code doesn't actually work in 32-bit mode at all.  Since
no one really noticed, drop the complication of v7 and v8 cpus.
Eliminate the --sparc_cpu configure option and standardize macro
testing on TCG_TARGET_REG_BITS / HOST_LONG_BITS

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Fix qemu_ld/st to handle 32-bit host.

At the same time, split out the tlb load logic to a new function.
Fixes the cases of two data registers and two address registers.
Fixes the signature of, and adds missing, qemu_ld/st opcodes.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Support GUEST_BASE.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Change AREG0 in generated code to %i0.

We can now move the TCG variable from %g[56] to a call-preserved
windowed register.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Clean up cruft stemming from attempts to use global registers.

Don't use -ffixed-gN.  Don't link statically.  Don't save/restore
AREG0 around calls.  Don't allocate space on the stack for AREG0 save.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Mask shift immediates to avoid illegal insns.

The xtensa-test image generates a sra_i32 with count 0x40.
Whether this is accident of tcg constant propagation or
originating directly from the instruction stream is immaterial.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Use defines for temporaries.

And change from %i4/%i5 to %g1/%o7 to remove a v8plus fixme.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Add %g/%o registers to alloc_order

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Fix and enable direct TB chaining.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Preserve branch destinations during retranslation

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg/ppc32: Implement movcond32

Thanks to Richard Henderson

Signed-off-by: malc <av1474@comtv.ru>
Revert "tcg/mips"

This reverts commit ad49d1f75115663731bfe06dec61eed6775526ad.

This commit was not supposed to be pushed.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
softfloat: make float_muladd_negate_* flags independent

Flags passed into float{32,64}_muladd are treated as bits; assign
independent bits to float_muladd_negate_* to allow precise control over
what gets negated in float{32,64}_muladd.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
softfloat: add NO_SIGNALING_NANS

Architectures that don't have signaling NaNs can define
NO_SIGNALING_NANS, it will make float*_is_quiet_nan return 1 for any NaN
and float*_is_signaling_nan always return 0.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-xtensa: handle boolean option in overlays

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-xtensa: specialize softfloat NaN rules

NaN propagation rule: leftmost NaN in the expression gets propagated to
the result.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>