[from now] Fri Dec 14 15:46:37 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index e4f354e..6f772c1 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -53,7 +53,7 @@ architecture Behavioral of sd_cont is
 	signal spi_go		: std_logic;
 	signal spi_delay	: std_logic_vector(7 downto 0);

-	signal state	: std_logic_vector(8 downto 0) := "000000000";
+	signal state	: std_logic_vector(9 downto 0) := (others => '0');
 	signal index	: std_logic_vector(5 downto 0);
 	signal argument	: std_logic_vector(31 downto 0);
 	signal resp	: std_logic_vector(7 downto 0);
@@ -77,7 +77,7 @@ begin
 					state <= state + '1';
 				end if;
 			--------------------------------------------------------------------------
-			elsif state(8 downto 6) = "000" then		-- CLK 8 * 16
+			elsif state(9 downto 7) = "000" then		-- CLK 8 * 16
 				spi_sdata <= "11111111";
 				sd_ce <= '1';
 				spi_delay <= "11111111";
@@ -118,7 +118,7 @@ begin
 					state <= state + "100";
 				else			-- Finish
 					state(5 downto 2) <= "0000";
-					state(8 downto 6) <= state(8 downto 6) + '1';
+					state(9 downto 7) <= state(9 downto 7) + '1';
 					sd_ce <= '1';
 				end if;
 			elsif state(5 downto 2) = "1010" then		-- Wait Data Token
@@ -153,28 +153,28 @@ begin
 				state <= state + '1';
 			--------------------------------------------------------------------------------------
 			---- Initialization Sequence ----
-			elsif state(8 downto 6) = "001" then		-- CMD 0
+			elsif state(9 downto 7) = "001" then		-- CMD 0
 				index <= "000000";
 				argument <= (others => '0');
 				state <= state + "100";
 				sd_ce <= '1';
-			elsif state(8 downto 6) = "010" then		-- CMD 55
+			elsif state(9 downto 7) = "010" then		-- CMD 55
 				index <= conv_std_logic_vector(55, 6);
 				argument <= (others => '0');
 				state <= state + "100";
 				sd_ce <= '1';
-			elsif state(8 downto 6) = "011" then		-- CMD 41
+			elsif state(9 downto 7) = "011" then		-- CMD 41
 				index <= conv_std_logic_vector(41, 6);
 				argument <= (others => '0');
 				state <= state + "100";
 				sd_ce <= '1';
-			elsif state(8 downto 6) = "100" then		-- Response Check
+			elsif state(9 downto 7) = "100" then		-- Response Check
 				if resp = "00000000" then
 					state <= state + "1000000";
 				else
 					state <= state - "10000000";
 				end if;
-			elsif state(8 downto 6) = "101" then		-- CMD 16
+			elsif state(9 downto 7) = "101" then		-- CMD 16
 				spi_delay <= "00000101";
 				index    <= conv_std_logic_vector(16, 6);
 				argument <= conv_std_logic_vector(512, 32);
@@ -182,7 +182,7 @@ begin
 				sd_ce <= '1';
 			-----------------------------------------------------------------------------------------
 			---- Loop ----
-			elsif state(8 downto 6) = "110" then
+			elsif state(9 downto 7) = "110" then
 				sd_ce <= '1';
 				if sd_go = '1' then
 					index <= conv_std_logic_vector(17, 6);
@@ -192,7 +192,7 @@ begin
 				else
 					sd_busy <= '0';
 				end if;
-			elsif state(8 downto 6) = "111" then
+			elsif state(9 downto 7) = "111" then
 				sd_ce <= '1';
 				state <= state - "1000000";
 				sd_busy <= '0';		-- C: Clear
[from now] Fri Dec 14 15:54:56 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index 6f772c1..5e96c82 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -84,58 +84,58 @@ begin
 				state <= state + '1';
 				sd_busy <= '1';
 			--------------------------------------------------------------------------
-			elsif state(5 downto 2) = "0001" then		-- Command Index
+			elsif state(6 downto 2) = "00001" then		-- Command Index
 				spi_sdata <= "01" & index;
 				sd_ce     <= '0';
 				state <= state + '1';
-			elsif state(5 downto 2) = "0010" then		-- Argument 1
+			elsif state(6 downto 2) = "00010" then		-- Argument 1
 				spi_sdata <= argument(31 downto 24);
 				state <= state + '1';
-			elsif state(5 downto 2) = "0011" then		-- Argument 2
+			elsif state(6 downto 2) = "00011" then		-- Argument 2
 				spi_sdata <= argument(23 downto 16);
 				state <= state + '1';
-			elsif state(5 downto 2) = "0100" then		-- Argument 3
+			elsif state(6 downto 2) = "00100" then		-- Argument 3
 				spi_sdata <= argument(15 downto 8);
 				state <= state + '1';
-			elsif state(5 downto 2) = "0101" then		-- Argument 4
+			elsif state(6 downto 2) = "00101" then		-- Argument 4
 				spi_sdata <= argument(7  downto 0);
 				state <= state + '1';
-			elsif state(5 downto 2) = "0110" then		-- CRC
+			elsif state(6 downto 2) = "00110" then		-- CRC
 				spi_sdata <= "10010101";
 				state <= state + '1';
-			elsif state(5 downto 2) = "0111" then		-- Response
+			elsif state(6 downto 2) = "00111" then		-- Response
 				spi_sdata <= "11111111";
 				state <= state + '1';
-			elsif state(5 downto 2) = "1000" then		-- Response Check
+			elsif state(6 downto 2) = "01000" then		-- Response Check
 				if spi_rdata = "11111111" then	-- Not received
 					state <= state - "100";
 				else				-- Received
 					state <= state + "100";
 					resp  <= spi_rdata;
 				end if;
-			elsif state(5 downto 2) = "1001" then		-- Finish or Continue(Cmd17)
+			elsif state(6 downto 2) = "01001" then		-- Finish or Continue(Cmd17)
 				if index = 17 then	-- CMD17
 					state <= state + "100";
 				else			-- Finish
-					state(5 downto 2) <= "0000";
+					state(6 downto 2) <= "00000";
 					state(9 downto 7) <= state(9 downto 7) + '1';
 					sd_ce <= '1';
 				end if;
-			elsif state(5 downto 2) = "1010" then		-- Wait Data Token
+			elsif state(6 downto 2) = "01010" then		-- Wait Data Token
 				spi_sdata <= "11111111";
 				state <= state + '1';
-			elsif state(5 downto 2) = "1011" then		-- Check if rdata is Data Token
+			elsif state(6 downto 2) = "01011" then		-- Check if rdata is Data Token
 				if spi_rdata = "11111110" then
 					state <= state + "100";
 				else
 					state <= state - "100";
 				end if;
 				addr_a <= "111111111";
-			elsif state(5 downto 2) = "1100" then		-- Receive Data
+			elsif state(6 downto 2) = "01100" then		-- Receive Data
 				spi_sdata <= "11111111";
 				we_a      <= '0';
 				state <= state + '1';
-			elsif state(5 downto 2) = "1101" then		-- Loop
+			elsif state(6 downto 2) = "01101" then		-- Loop
 				addr_a  <= addr_a + '1';
 				we_a    <= '1';
 				data_a  <= spi_rdata;
@@ -144,13 +144,16 @@ begin
 				else
 					state <= state - "100";
 				end if;
-			elsif state(5 downto 2) = "1110" then		-- CRC1
+			elsif state(6 downto 2) = "01110" then		-- CRC1
 				spi_sdata <= "11111111";
 				we_a      <= '0';
 				state <= state + '1';
-			elsif state(5 downto 2) = "1111" then		-- CRC2 and Finish
+			elsif state(6 downto 2) = "01111" then		-- CRC2
 				spi_sdata <= "11111111";
 				state <= state + '1';
+			elsif state(6 downto 2) = "10000" then		-- Finish read
+				state(6 downto 2) <= "00000";
+				state(9 downto 7) <= state(9 downto 7) + '1';
 			--------------------------------------------------------------------------------------
 			---- Initialization Sequence ----
 			elsif state(9 downto 7) = "001" then		-- CMD 0
[from now] Fri Dec 14 16:02:36 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index 5e96c82..3b450e6 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -173,9 +173,9 @@ begin
 				sd_ce <= '1';
 			elsif state(9 downto 7) = "100" then		-- Response Check
 				if resp = "00000000" then
-					state <= state + "1000000";
+					state <= state + "10000000";
 				else
-					state <= state - "10000000";
+					state <= state - "100000000";
 				end if;
 			elsif state(9 downto 7) = "101" then		-- CMD 16
 				spi_delay <= "00000101";
@@ -197,7 +197,7 @@ begin
 				end if;
 			elsif state(9 downto 7) = "111" then
 				sd_ce <= '1';
-				state <= state - "1000000";
+				state <= state - "10000000";
 				sd_busy <= '0';		-- C: Clear
 			end if;
 		end if;
[from now] Fri Dec 14 16:09:04 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index 3b450e6..db396cf 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -173,9 +173,9 @@ begin
 				sd_ce <= '1';
 			elsif state(9 downto 7) = "100" then		-- Response Check
 				if resp = "00000000" then
-					state <= state + "10000000";
+					state(9 downto 7) <= state(9 downto 7) + "1";
 				else
-					state <= state - "100000000";
+					state(9 downto 7) <= state(9 downto 7) - "10";
 				end if;
 			elsif state(9 downto 7) = "101" then		-- CMD 16
 				spi_delay <= "00000101";
@@ -197,7 +197,7 @@ begin
 				end if;
 			elsif state(9 downto 7) = "111" then
 				sd_ce <= '1';
-				state <= state - "10000000";
+				state(9 downto 7) <= state(9 downto 7) - "1";
 				sd_busy <= '0';		-- C: Clear
 			end if;
 		end if;
[from now] Fri Dec 14 16:34:10 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index db396cf..1d5da58 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -121,6 +121,8 @@ begin
 					state(9 downto 7) <= state(9 downto 7) + '1';
 					sd_ce <= '1';
 				end if;
+
+			----------------
 			elsif state(6 downto 2) = "01010" then		-- Wait Data Token
 				spi_sdata <= "11111111";
 				state <= state + '1';
@@ -154,6 +156,51 @@ begin
 			elsif state(6 downto 2) = "10000" then		-- Finish read
 				state(6 downto 2) <= "00000";
 				state(9 downto 7) <= state(9 downto 7) + '1';
+
+			----------------
+			elsif state(6 downto 2) = "10001" then		-- Wait 1 byte
+				spi_sdata <= x"11";
+				state <= state + '1';
+			elsif state(6 downto 2) = "10010" then		-- Send token and setup to read from BRAM
+				spi_sdata <= x"fe";
+				state <= state + '1';
+				sd_write_mode <= '1';
+				read_addr <= (others => '0');
+			elsif state(6 downto 2) = "10011" then		-- Send data
+				spi_sdata <= ram_data;
+				state <= state + '1';
+			elsif state(6 downto 2) = "10100" then		-- Loop
+				ram_addr <= ram_addr + 1;
+				if ram_addr = "111111111" then
+					state(6 downto 2) <= state(6 downto 2) + 1;
+				else
+					state(6 downto 2) <= state(6 downto 2) - 1;
+				end if;
+			elsif state(6 downto 2) = "10101" then		-- CRC1 (dummy)
+				spi_sdata <= "11111111";
+				sd_write_mode <= '0';
+				state <= state + '1';
+			elsif state(6 downto 2) = "10110" then		-- CRC2
+				spi_sdata <= "11111111";
+				state <= state + '1';
+			elsif state(6 downto 2) = "10111" then		-- Read data response
+				spi_sdata <= "11111111";
+				state <= state + '1';
+			elsif state(6 downto 2) = "11000" then		-- Check response and retry
+				if spi_rdata(5 downto 0) = "00101" then
+					spi_sdata <= "11111111";
+					state(6 downto 2) <= state(6 downto 2) + '1';
+				else
+					state(6 downto 2) <= "00001";
+				end if;
+			elsif state(6 downto 2) = "11001" then		-- Wait while busy, then Finish
+				if sd_in = '0' then
+					state <= state;
+				else
+					state(6 downto 2) <= "00000";
+					state(9 downto 7) <= state(9 downto 7) + '1';
+				end if;
+
 			--------------------------------------------------------------------------------------
 			---- Initialization Sequence ----
 			elsif state(9 downto 7) = "001" then		-- CMD 0
[from now] Fri Dec 14 16:35:44 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index 1d5da58..bc6aa4c 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -58,9 +58,13 @@ architecture Behavioral of sd_cont is
 	signal argument	: std_logic_vector(31 downto 0);
 	signal resp	: std_logic_vector(7 downto 0);

+	-- block RAM
 	signal addr_a	: std_logic_vector(8 downto 0) := (others => '0');
 	signal data_a	: std_logic_vector(7 downto 0);
 	signal we_a	: STD_LOGIC;
+	signal sd_write_mode : STD_LOGIC;
+	signal read_addr : std_logic_vector(8 downto 0);
+	signal ram_data : std_logic_vector(7 downto 0);
 begin

 	process(clk)begin
[from now] Fri Dec 14 16:36:09 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index bc6aa4c..8de57eb 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -174,8 +174,8 @@ begin
 				spi_sdata <= ram_data;
 				state <= state + '1';
 			elsif state(6 downto 2) = "10100" then		-- Loop
-				ram_addr <= ram_addr + 1;
-				if ram_addr = "111111111" then
+				read_addr <= read_addr + 1;
+				if read_addr = "111111111" then
 					state(6 downto 2) <= state(6 downto 2) + 1;
 				else
 					state(6 downto 2) <= state(6 downto 2) - 1;
[from now] Fri Dec 14 16:47:13 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index 8de57eb..eb111ff 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -15,7 +15,8 @@ entity sd_cont is
 		sd_data	: out std_logic_vector(7 downto 0);
 		sd_addr	: in  std_logic_vector(22 downto 0);
 		sd_index: in  std_logic_vector(8 downto 0);
-		sd_go	: in  std_logic;
+		sd_read	: in  std_logic;
+		sd_write : in	STD_LOGIC;
 		sd_busy	: out STD_LOGIC := '1'
 	);
 end sd_cont;
@@ -63,10 +64,12 @@ architecture Behavioral of sd_cont is
 	signal data_a	: std_logic_vector(7 downto 0);
 	signal we_a	: STD_LOGIC;
 	signal sd_write_mode : STD_LOGIC;
-	signal read_addr : std_logic_vector(8 downto 0);
+	signal read_addr, ram_addr : std_logic_vector(8 downto 0);
 	signal ram_data : std_logic_vector(7 downto 0);
 begin

+	sd_data <= ram_data;
+
 	process(clk)begin
 		if rising_edge(clk)then

@@ -117,9 +120,11 @@ begin
 					state <= state + "100";
 					resp  <= spi_rdata;
 				end if;
-			elsif state(6 downto 2) = "01001" then		-- Finish or Continue(Cmd17)
+			elsif state(6 downto 2) = "01001" then		-- Finish or Continue(Cmd17,  Cmd24)
 				if index = 17 then	-- CMD17
 					state <= state + "100";
+				elsif index = 24 then	-- CMD24
+					state(6 downto 2) <= "10001";
 				else			-- Finish
 					state(6 downto 2) <= "00000";
 					state(9 downto 7) <= state(9 downto 7) + '1';
@@ -238,8 +243,12 @@ begin
 			---- Loop ----
 			elsif state(9 downto 7) = "110" then
 				sd_ce <= '1';
-				if sd_go = '1' then
-					index <= conv_std_logic_vector(17, 6);
+				if sd_read = '1' or sd_write = '1' then
+					if sd_read = '1' then
+						index <= conv_std_logic_vector(17, 6);
+					elsif sd_write = '1' then
+						index <= conv_std_logic_vector(24, 6);
+					end if;
 					argument <= sd_addr & "000000000";
 					state <= state + "100";
 					sd_busy <= '1';	-- C: Set <- Busy
@@ -254,6 +263,8 @@ begin
 		end if;
 	end process;

+	ram_addr <= read_addr when sd_write_mode = '1' else sd_index;
+
 	sdmem: sd_memory
 		port map(
 			clk 	=> clk,
@@ -261,8 +272,8 @@ begin
 			dina	=> data_a,
 			wea	=> we_a,

-			addrb	=> sd_index,
-			doutb	=> sd_data
+			addrb	=> ram_addr,
+			doutb	=> ram_data
 		);

 	spic: spi_cont
[from now] Fri Dec 14 17:02:04 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index eb111ff..859d6fc 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -5,19 +5,22 @@ use IEEE.STD_LOGIC_1164.ALL;

 entity sd_cont is
 	port(
-		clk	: in  std_logic;
+		clk    : in  std_logic;

-		sd_clk	: out std_logic;
-		sd_ce	: out std_logic;
-		sd_out	: out std_logic;
-		sd_in	: in  std_logic;
+		sd_clk : out std_logic;
+		sd_ce  : out std_logic;
+		sd_out : out std_logic;
+		sd_in  : in  std_logic;

-		sd_data	: out std_logic_vector(7 downto 0);
-		sd_addr	: in  std_logic_vector(22 downto 0);
-		sd_index: in  std_logic_vector(8 downto 0);
-		sd_read	: in  std_logic;
+		sd_index        : in  std_logic_vector(8 downto 0);
+		sd_read_data    : out std_logic_vector(7 downto 0);
+		sd_write_data   : in std_logic_vector(7 downto 0);
+		sd_write_enable : in STD_LOGIC;
+
+		sd_addr  : in  std_logic_vector(22 downto 0);
+		sd_read  : in  std_logic;
 		sd_write : in	STD_LOGIC;
-		sd_busy	: out STD_LOGIC := '1'
+		sd_busy  : out STD_LOGIC := '1'
 	);
 end sd_cont;

@@ -68,7 +71,7 @@ architecture Behavioral of sd_cont is
 	signal ram_data : std_logic_vector(7 downto 0);
 begin

-	sd_data <= ram_data;
+	sd_read_data <= ram_data;

 	process(clk)begin
 		if rising_edge(clk)then
[from now] Fri Dec 14 17:02:56 JST 2012

diff --git a/2nd/sdcard/top.v b/2nd/sdcard/top.v
new file mode 100644
index 0000000..c86d5ff
--- /dev/null
+++ b/2nd/sdcard/top.v
@@ -0,0 +1,113 @@
+`timescale 1ns / 1ps
+//////////////////////////////////////////////////////////////////////////////////
+// Company:
+// Engineer:
+//
+// Create Date:    11:11:25 12/13/2012
+// Design Name:
+// Module Name:    top
+// Project Name:
+// Target Devices:
+// Tool versions:
+// Description:
+//
+// Dependencies:
+//
+// Revision:
+// Revision 0.01 - File Created
+// Additional Comments:
+//
+//////////////////////////////////////////////////////////////////////////////////
+module top(
+           input  CLK,
+           input  XRST,
+           output RS_TX,
+           input  RS_RX,
+
+           output SD_CS,
+           input  SD_DI,
+           output SD_SCLK,
+           output SD_DO);
+
+   wire MCLK, iclk;
+
+   IBUFG ig (.I(CLK), .O(MCLK));
+   BUFG bg (.I(MCLK), .O(iclk));
+
+   wire rs_busy, sd_busy;
+   reg rs_go, sd_read, sd_write;
+   wire [7:0] data;
+   wire [22:0] sd_addr;
+   reg [8:0] sd_index;
+
+   reg [2:0] state;
+   reg [31:0] address;
+
+   reg [7:0] write_data;
+   reg write_enable;
+
+   initial begin
+      state <= 3'b0;
+      address <= 32'h0;
+   end
+
+   assign sd_addr = 23'b0;
+   // assign sd_index = 10'h1fe;
+
+   // assign data = address[7:0];
+
+   u232c #(.len(1)) u232c_inst
+      (.clk(iclk),
+       .data(data),
+       .go(rs_go),
+       .busy(rs_busy),
+       .tx(RS_TX));
+
+   wire [7:0] dummy_data;
+
+   sd_cont sd_cont_inst
+      (.clk(iclk),
+       .sd_clk(SD_SCLK),
+       .sd_ce(SD_CS),
+       .sd_out(SD_DO),
+       .sd_in(SD_DI),
+
+       .sd_addr(sd_addr),
+       .sd_read_data(data),
+       .sd_write_data(write_data),
+       .sd_write_enable(write_enable),
+       .sd_index(sd_index),
+       .sd_read(sd_read),
+       .sd_write(sd_write),
+       .sd_busy(sd_busy));
+
+   always @ (posedge(iclk)) begin
+      sd_read <= 0;
+      rs_go <= 0;
+
+      case (state)
+        3'b000: begin
+           sd_read <= 1;
+           sd_index <= 9'b111111110;
+           if (data == 8'h55)
+              state <= 3'b001;
+        end
+
+        3'b001: begin
+           sd_index <= sd_index + 1;
+           rs_go <= 1;
+           state <= 3'b010;
+        end
+
+        3'b010: begin
+           if (rs_go == 0 && rs_busy == 0) begin
+              state <= 3'b001;
+           end
+        end
+
+        default:
+           state <= 3'b0;
+      endcase
+   end
+
+endmodule
[from now] Fri Dec 14 17:18:21 JST 2012

diff --git a/2nd/sdcard/top.v b/2nd/sdcard/top.v
index c86d5ff..8a64f0a 100644
--- a/2nd/sdcard/top.v
+++ b/2nd/sdcard/top.v
@@ -94,9 +94,13 @@ module top(
         end

         3'b001: begin
-           sd_index <= sd_index + 1;
-           rs_go <= 1;
-           state <= 3'b010;
+           sd_index <= sd_index + 9'b1;
+           if (sd_index == 9'b0) begin
+              state <= 3'b011;
+           end else begin
+              rs_go <= 1;
+              state <= 3'b010;
+           end
         end

         3'b010: begin
@@ -105,6 +109,9 @@ module top(
            end
         end

+        3'b011:
+           state <= state;
+
         default:
            state <= 3'b0;
       endcase
[from now] Fri Dec 14 17:23:45 JST 2012

diff --git a/2nd/sdcard/top.v b/2nd/sdcard/top.v
index 8a64f0a..6dd282a 100644
--- a/2nd/sdcard/top.v
+++ b/2nd/sdcard/top.v
@@ -89,8 +89,10 @@ module top(
         3'b000: begin
            sd_read <= 1;
            sd_index <= 9'b111111110;
-           if (data == 8'h55)
+           if (data == 8'h55) begin
+              sd_index <= 9'b1;
               state <= 3'b001;
+           end
         end

         3'b001: begin
[from now] Fri Dec 14 17:26:52 JST 2012

diff --git a/2nd/sdcard/top.v b/2nd/sdcard/top.v
index 6dd282a..3711fee 100644
--- a/2nd/sdcard/top.v
+++ b/2nd/sdcard/top.v
@@ -90,28 +90,31 @@ module top(
            sd_read <= 1;
            sd_index <= 9'b111111110;
            if (data == 8'h55) begin
-              sd_index <= 9'b1;
+              sd_index <= 9'b0;
               state <= 3'b001;
            end
         end

         3'b001: begin
-           sd_index <= sd_index + 9'b1;
-           if (sd_index == 9'b0) begin
-              state <= 3'b011;
-           end else begin
-              rs_go <= 1;
-              state <= 3'b010;
-           end
+           rs_go <= 1;
+           state <= 3'b010;
         end

         3'b010: begin
            if (rs_go == 0 && rs_busy == 0) begin
-              state <= 3'b001;
+              state <= 3'b011;
            end
         end

-        3'b011:
+        3'b011: begin
+           if (sd_index == 9'h1ff) begin
+              state <= 3'b100;
+           end else begin
+              state <= 3'b001;
+              sd_index <= sd_index + 9'b1;
+           end
+
+        3'b100:
            state <= state;

         default:
[from now] Fri Dec 14 17:27:10 JST 2012

diff --git a/2nd/sdcard/top.v b/2nd/sdcard/top.v
index 3711fee..256d50a 100644
--- a/2nd/sdcard/top.v
+++ b/2nd/sdcard/top.v
@@ -113,6 +113,7 @@ module top(
               state <= 3'b001;
               sd_index <= sd_index + 9'b1;
            end
+        end

         3'b100:
            state <= state;
[from now] Fri Dec 14 17:34:52 JST 2012

diff --git a/2nd/sdcard/top.v b/2nd/sdcard/top.v
index 256d50a..3b54b25 100644
--- a/2nd/sdcard/top.v
+++ b/2nd/sdcard/top.v
@@ -83,6 +83,8 @@ module top(

    always @ (posedge(iclk)) begin
       sd_read <= 0;
+      write_enable <= 0;
+      sd_write <= 0;
       rs_go <= 0;

       case (state)
@@ -115,11 +117,38 @@ module top(
            end
         end

-        3'b100:
-           state <= state;
+        // Write to BRAM
+        3'b100: begin
+           write_enable <= 1;
+           write_data <= 8'hff;
+           sd_index <= 9'h0ff;
+           state <= state + 1;
+        end
+
+        // Write back BRAM to SD
+        3'b101: begin
+           sd_write <= 1;
+           state <= state + 1;
+        end
+
+        // Wait until write back ends
+        3'b101: begin
+           if (sd_write == 0 && sd_busy == 0)
+             state <= state + 1;
+        end
+
+        // Reload BRAM
+        3'b110: begin
+           sd_read <= 1;
+           state <= state + 1;
+        end

-        default:
-           state <= 3'b0;
+        3'b111: begin
+           if (sd_read == 0 && sd_busy == 0) begin
+              sd_index <= 9'b0;
+              state <= 3'b001;
+           end
+        end
       endcase
    end
[from now] Fri Dec 14 17:38:11 JST 2012

diff --git a/2nd/sdcard/top.v b/2nd/sdcard/top.v
index 3b54b25..37ffe4f 100644
--- a/2nd/sdcard/top.v
+++ b/2nd/sdcard/top.v
@@ -149,6 +149,9 @@ module top(
               state <= 3'b001;
            end
         end
+
+        default:
+          state <= 3'b0;
       endcase
    end
[from now] Fri Dec 14 17:43:10 JST 2012

diff --git a/2nd/sdcard/top.v b/2nd/sdcard/top.v
index 37ffe4f..de8d78c 100644
--- a/2nd/sdcard/top.v
+++ b/2nd/sdcard/top.v
@@ -117,41 +117,8 @@ module top(
            end
         end

-        // Write to BRAM
-        3'b100: begin
-           write_enable <= 1;
-           write_data <= 8'hff;
-           sd_index <= 9'h0ff;
-           state <= state + 1;
-        end
-
-        // Write back BRAM to SD
-        3'b101: begin
-           sd_write <= 1;
-           state <= state + 1;
-        end
-
-        // Wait until write back ends
-        3'b101: begin
-           if (sd_write == 0 && sd_busy == 0)
-             state <= state + 1;
-        end
-
-        // Reload BRAM
-        3'b110: begin
-           sd_read <= 1;
-           state <= state + 1;
-        end
-
-        3'b111: begin
-           if (sd_read == 0 && sd_busy == 0) begin
-              sd_index <= 9'b0;
-              state <= 3'b001;
-           end
-        end
-
         default:
-          state <= 3'b0;
+          state <= state;
       endcase
    end
[from now] Fri Dec 14 17:58:38 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index 859d6fc..cb4d6f7 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -63,11 +63,11 @@ architecture Behavioral of sd_cont is
 	signal resp	: std_logic_vector(7 downto 0);

 	-- block RAM
-	signal addr_a	: std_logic_vector(8 downto 0) := (others => '0');
-	signal data_a	: std_logic_vector(7 downto 0);
+	signal write_addr, ram_write_addr	: std_logic_vector(8 downto 0) := (others => '0');
+	signal write_data	: std_logic_vector(7 downto 0);
 	signal we_a	: STD_LOGIC;
 	signal sd_write_mode : STD_LOGIC;
-	signal read_addr, ram_addr : std_logic_vector(8 downto 0);
+	signal read_addr, ram_read_addr : std_logic_vector(8 downto 0);
 	signal ram_data : std_logic_vector(7 downto 0);
 begin

@@ -144,16 +144,16 @@ begin
 				else
 					state <= state - "100";
 				end if;
-				addr_a <= "111111111";
+				write_addr <= "111111111";
 			elsif state(6 downto 2) = "01100" then		-- Receive Data
 				spi_sdata <= "11111111";
 				we_a      <= '0';
 				state <= state + '1';
 			elsif state(6 downto 2) = "01101" then		-- Loop
-				addr_a  <= addr_a + '1';
+				write_addr  <= write_addr + '1';
 				we_a    <= '1';
-				data_a  <= spi_rdata;
-				if addr_a = "111111110" then
+				write_data  <= spi_rdata;
+				if write_addr = "111111110" then
 					state <= state + "100";
 				else
 					state <= state - "100";
@@ -266,16 +266,19 @@ begin
 		end if;
 	end process;

-	ram_addr <= read_addr when sd_write_mode = '1' else sd_index;
+
+	ram_write_addr <= write_addr when we_a = '1' else sd_index;
+	ram_write_data <= write_data when we_a = '1' else sd_write_data;
+	ram_read_addr <= read_addr when sd_write_mode = '1' else sd_index;

 	sdmem: sd_memory
 		port map(
 			clk 	=> clk,
-			addra	=> addr_a,
-			dina	=> data_a,
-			wea	=> we_a,
+			addra	=> ram_write_addr,
+			dina	=> ram_write_data,
+			wea	=> we_a or sd_write_enable,

-			addrb	=> ram_addr,
+			addrb	=> ram_read_addr,
 			doutb	=> ram_data
 		);
[from now] Fri Dec 14 18:34:31 JST 2012

diff --git a/2nd/sdcard/sd_cont.vhd b/2nd/sdcard/sd_cont.vhd
index 063d68d..dfc05cb 100644
--- a/2nd/sdcard/sd_cont.vhd
+++ b/2nd/sdcard/sd_cont.vhd
@@ -57,7 +57,7 @@ architecture Behavioral of sd_cont is
 	signal spi_go		: std_logic;
 	signal spi_delay	: std_logic_vector(7 downto 0);

-	signal state	: std_logic_vector(9 downto 0) := (others => '0');
+	signal state	: std_logic_vector(9 downto 0) := "1100000000";--only for test
 	signal index	: std_logic_vector(5 downto 0);
 	signal argument	: std_logic_vector(31 downto 0);
 	signal resp	: std_logic_vector(7 downto 0);
diff --git a/2nd/sdcard/test_sd_cont.v b/2nd/sdcard/test_sd_cont.v
new file mode 100644
index 0000000..be371f8
--- /dev/null
+++ b/2nd/sdcard/test_sd_cont.v
@@ -0,0 +1,57 @@
+module test_sd_cont();
+
+   reg clk;
+
+   reg sd_in;
+   wire sd_clk, sd_ce, sd_out;
+
+   reg [8:0] sd_index;
+   wire [7:0] sd_read_data;
+   reg [7:0] sd_write_data;
+   reg sd_write_enable;
+
+   reg sd_write;
+
+   wire sd_busy;
+
+   sd_cont dut
+     (.clk(clk),
+      .sd_clk(sd_clk),
+      .sd_ce(sd_ce),
+      .sd_out(sd_out),
+      .sd_in(sd_in),
+
+      .sd_index(sd_index),
+      .sd_read_data(sd_read_data),
+      .sd_write_data(sd_write_data),
+      .sd_write_enable(sd_write_enable),
+
+      .sd_addr(23'b0),
+      .sd_write(sd_write),
+      .sd_busy(sd_busy));
+
+   initial begin
+      sd_in <= 1'b0;
+      dut.state <= 10'b1100000000;
+      #28;
+
+      sd_index <= 9'h3;
+      sd_write_data <= 8'haa;
+      sd_write_enable <= 1;
+      #10;
+
+      sd_write <= 1;
+      #10;
+
+      sd_in <= 1'b0;
+   end
+
+   // geenrate clock to sequence tests
+   always begin
+      clk <= 1;
+      #5;
+      clk <= 0;
+      #5;
+   end
+
+endmodule
[from now] Fri Dec 14 18:34:48 JST 2012

diff --git a/2nd/sdcard/test_sd_cont.v b/2nd/sdcard/test_sd_cont.v
index be371f8..9aed61f 100644
--- a/2nd/sdcard/test_sd_cont.v
+++ b/2nd/sdcard/test_sd_cont.v
@@ -32,7 +32,6 @@ module test_sd_cont();

    initial begin
       sd_in <= 1'b0;
-      dut.state <= 10'b1100000000;
       #28;

       sd_index <= 9'h3;