[TASK] Create documentation for altera and xilinx, change global readme.txt

* Add altera and xilinx documentation to Documentation folder
* Modify readme.txt to support Altera and Xilinx demos

Change-Id: I4c285c0138aafe4fc91b1de0be3d497cee101483
Reviewed-on: http://brateggevoat1/gerrit/223
Reviewed-by: Joerg Zelenka <joerg.zelenka@br-automation.com>
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
[FIX] Add Xilinx support into Benchmark.h

* Benchmark.h is now supporting Xilinx

Change-Id: I20b7c6f5300bc12f8c212fb439c9e2a7a54b0141
Reviewed-on: http://brateggevoat1/gerrit/215
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
[FIX] Enhance xilinx usleep

* The old xilinx usleep implementation was very inexact. This version is
  rewritten in assembler to be more accurate.

Change-Id: I25e8fafcb6f9020ea7613868c913ade7f2a66829
Reviewed-on: http://brateggevoat1/gerrit/216
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FIX] Update EdrvOpenmac

* Add print in case of DMA observer error
* Add omethlib_phycfg module for phy/board specific configuration
* Introduced debug.h to EdrvOpenMac.c
* Zero jitter fix and cycle time violation is noticed in
  EdrvCyclicOpenMac and forwarded to error handling correctly
* Confusion of EDRV_MAX_AUTO_RESPONSES and EDRV_MAX_FILTERS

Change-Id: I6b19ed7c7be5e5d949373ba086630db6ebe1a271
Reviewed-on: http://brateggevoat1/gerrit/214
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Change Altera POWERLINK IP-Core

* introduce IP-Core repository

Change-Id: I4613dcf31fde2211aa33d781660bbed52c1a92c2
Reviewed-on: http://brateggevoat1/gerrit/218
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Change Xilinx POWERLINK IP-Core

* Add AXI IP-Core
* update PLB IP-Core
* introduce IP-Core repository

Change-Id: I18cbd88b06907069ca9381d61237b1a12085cb7c
Reviewed-on: http://brateggevoat1/gerrit/211
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Update Altera TERASIC INK directIO examples

* Introduce IP-Core repository
* Update IP-Core

Change-Id: I7bafd837f257bb25f2eebf0d794baf7679f504b6
Reviewed-on: http://brateggevoat1/gerrit/219
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Update Altera EBV_DBC3C40 directIO examples

* Introduce IP-Core repository
* Update IP-Core
* Create 100clk to fit to original .sdc file

Change-Id: Id4af4b55dd347114a288b7f88ac325d57207e91f
Reviewed-on: http://brateggevoat1/gerrit/220
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Update Altera SYSTEC_ECUcore-EP3C directIO example (not verified)

* Introduce IP-Core repository
* Update IP-Core

Change-Id: I8b651c35bb290e002928d6bcd0b6de0c8f07c925
Reviewed-on: http://brateggevoat1/gerrit/221
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Update Xilinx lx150t directIO examples

* Create AXI directIO example
* Update PLB example to use directIO module of IP-Core

Change-Id: Icaa87e7e811151f09859131f25115fc1e4465b9b
Reviewed-on: http://brateggevoat1/gerrit/212
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Update Xilinx lx9 directIO examples

* Create AXI directIO example
* Update PLB example to use directIO module of IP-Core

Change-Id: Ia3fa6756f1c7139605203b692396e329df8f71bf
Reviewed-on: http://brateggevoat1/gerrit/213
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Update Altera directIO software example

* Introduce enhanced LCD interface
* Move target specific functions into seperate file (systemComponents.c)

Change-Id: Ia34bd58434b0c25991722181e0685d2cb2580fdd
Reviewed-on: http://brateggevoat1/gerrit/222
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Update Xilinx directIO software example

* Introduce Makefile for easier building
* Move target specific functions into seperate file (systemComponents.c)

Change-Id: Iad3e0fb03df078f3042a4eaccfe137bd19824d32
Reviewed-on: http://brateggevoat1/gerrit/217
Reviewed-by: Josef Baumgartner <josef.baumgartner@br-automation.com>
Tested-by: Thomas Mair <thomas.mair@br-automation.com>
[FEATURE] Integrate FPGA architecture changes