r600g: Compute support for Cayman
radeon/llvm: Fix MULLO* instructions on Cayman

On Cayman, the MULLO* instructions must fill all slots in an
instruction group.
radeon/llvm: Remove some duplicate code in the R600 CodeEmitter
radeon/llvm: Emulate RECIP_UINT instruction on Cayman
glsl: Hook up loop_variable_state destructor to plug a memory leak.

While ~loop_state() is already freeing the loop_variable_state objects
via ralloc_free(this->mem_ctx), the ~loop_variable_state() destructor
was never getting called, so the hash table inside loop_variable_state
was never getting destroyed.

Fixes a memory leak in any shader with loops.

NOTE: This is a candidate for stable release branches.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
mesa: Return 8 bits for GL_TEXTURE_RED_SIZE on RGTC formats.

From the issues section of the GL_ARB_texture_compression_rgtc extension:

15) What should glGetTexLevelParameter return for
    GL_TEXTURE_GREEN_SIZE and GL_TEXTURE_BLUE_SIZE for the RGTC1
    formats?  What should glGetTexLevelParameter return for
    GL_TEXTURE_BLUE_SIZE for the RGTC2 formats?

    RESOLVED:  Zero bits.

    These formats always return 0.0 for these respective components
    and have no bits devoted to these components.

    Returning 8 bits for red size of RGTC1 and the red and green
    sizes of RGTC2 makes sense because that's the maximum potential
    precision for the uncompressed texels.

Thus, we need to return 8 bits for GL_TEXTURE_RED_SIZE on all RGTC formats
and 8 bits for GL_TEXTURE_GREEN_SIZE on RGTC2 formats.  BLUE should be 0.

Fixes oglconform/rgtc/advanced.texture_fetch.tex_param.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
glsl: Scaffolding for ARB_shader_bit_encoding.

That adds support for activating the extension.  It doesn't actually
*do* anything yet, of course.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: New unary opcodes for ARB_shader_bit_encoding support.

The opcodes are bitcast_f2u, bitcast_f2i, bitcast_i2f and bitcast_u2f.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: Bitwise conversion operator support in ir_expression.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: Bitwise conversion operator support in ir_validate.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: Bitwise conversion operator support in ir_constant_expression.

A "test_out = floatBitsToUint(-1.0);" fired through the GLSL compiler
gives a correct "(assign (x) (var_ref test_out)
(constant uint (3212836864)))"

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
glsl: Bitwise conversion operator support in the software renderers.

TGSI doesn't need an opcode, since registers are untyped (but beware
once doubles come into the scene).  Mesa IR doesn't handle native
integers, so trying to handle them there is worthless, the case
entries are only added for warning reasons.

It was only tested with softpipe, since llvmpipe doesn't support glsl
1.3 yet.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
st/mesa: Finally activate the ARB_shader_bit_encoding extension.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Enable the GL_ARB_shader_bit_encode extension.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
i965/blorp: Refactor surface format determination.

This patch moves the responsibility for deciding on the format of the
source and destination surfaces from the
gen{6,7}_blorp_emit_surface_state() functions to
brw_blorp_surface_info::set(), which is shared between Gen6 and Gen7.
This will make it possible to add support for more surface formats
without code duplication.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/blorp: De-virtualize brw_blorp_{mip,surface}_info::set() function.

Even though brw_blorp_surface_info is derived from brw_blorp_mip_info,
this function doesn't need to be virtual, because it is never accessed
through a base class pointer.  Making the function non-virtual will
allow it to take additional parameters in the brw_blorp_surface_info
case.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/blorp: Implement logic for additional buffer formats.

Previously the blorp engine only supported RGBA8 color buffers and
24-bit depth buffers.  This patch adds support for any color buffer
format that is supported as a render target, and for 16-bit and 32-bit
depth buffers.

This required threading the brw_context struct through into
brw_blorp_surface_info::set() so that it can consult the
brw->render_target_format array.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/blorp: allow all buffer formats provided src and dst match.

Previously, blits using the "blorp" mechanism only worked for 8-bit
RGBA color buffers, 24-bit depth buffers, and 8 bit stencil buffers.
This was not enough, because the blorp mechanism must be used for
blitting whenever MSAA is in use.  This patch allows all formats to be
used, provided the source and destination formats match.

So far I have confirmed that the following formats work properly with
MSAA:
- GL_RGB
- GL_RGBA
- GL_ALPHA
- GL_ALPHA4
- GL_ALPHA8
- GL_R3_G3_B2
- GL_RGB4
- GL_RGB5
- GL_RGB8
- GL_RGB10
- GL_RGB12
- GL_RGB16
- GL_RGBA2
- GL_RGBA4
- GL_RGB5_A1
- GL_RGBA8
- GL_RGB10_A2
- GL_RGBA12
- GL_RGBA16

Fixes piglit tests "EXT_framebuffer_multisample/formats {2,4}" on
Sandy Bridge and Ivy Bridge.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965: Add forgotten bitcast operations in brw_fs_channel_expressions.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
gallivm: Fix calculating rho for 3d textures for the single-quad case

Discovered by accident, this looks like a very old typo bug.

Signed-off-by: José Fonseca <jfonseca@vmware.com>