Reverted yet again
arm: smp: Wrap backtrace IPI with irq_enter/exit

This appears to be something that should also be wrapped.  Also,
the backtraces experienced may be a cause and not a symptom -
instead of an RCU stall causing backtraces, backtraces
may be causing an RCU stall - which causes more backtraces
and then the system gets mental.

Change-Id: If1c24afd497dd77b0505ad6caf74216b068eed36
Signed-off-by: Andrew Dodd <atd7@cornell.edu>
ARM: smp: Align secondary_start_kernel with mainline

Enable local IRQs after booting the cpu. (myfluxi)
sched: Cleanup cpu_active madness

sched: Cleanup cpu_active madness

    Stepan found:

    CPU0		CPUn

    _cpu_up()
      __cpu_up()

    		boostrap()
    		  notify_cpu_starting()
    		  set_cpu_online()
    		  while (!cpu_active())
    		    cpu_relax()

    <PREEMPT-out>

    smp_call_function(.wait=1)
      /* we find cpu_online() is true */
      arch_send_call_function_ipi_mask()

      /* wait-forever-more */

    <PREEMPT-in>
    		  local_irq_enable()

      cpu_notify(CPU_ONLINE)
        sched_cpu_active()
          set_cpu_active()

    Now the purpose of cpu_active is mostly with bringing down a cpu, where
    we mark it !active to avoid the load-balancer from moving tasks to it
    while we tear down the cpu. This is required because we only update the
    sched_domain tree after we brought the cpu-down. And this is needed so
    that some tasks can still run while we bring it down, we just don't want
    new tasks to appear.

    On cpu-up however the sched_domain tree doesn't yet include the new cpu,
    so its invisible to the load-balancer, regardless of the active state.
    So instead of setting the active state after we boot the new cpu (and
    consequently having to wait for it before enabling interrupts) set the
    cpu active before we set it online and avoid the whole mess.

    Reported-by: Stepan Moskovchenko <stepanm@codeaurora.org>
    Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
    Acked-by: Thomas Gleixner <tglx@linutronix.de>
    Link: http://lkml.kernel.org/r/1323965362.18942.71.camel@twins
    Signed-off-by: Ingo Molnar <mingo@elte.hu>
ARM: SMP: use a timing out completion for cpu hotplug

ARM: SMP: use a timing out completion for cpu hotplug

    Rather than open-coding the jiffy-based wait, and polling for the
    secondary CPU to come online, use a completion instead.  This
    removes the need to poll, instead we will be notified when the
    secondary CPU has initialized.

    Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Extra CFLAGS & Graphite optimizations
Linux 3.0.29

Changelog:
http://www.kernel.org/pub/linux/kernel/v3.0/ChangeLog-3.0.29
cpufreq: interactive: apply intermediate load to max speed not current

Evaluate spikes in load (below go_hispeed_load) against the maximum
speed supported by the device, not the current speed (which tends to
make it too difficult to raise speed to intermediate levels until
very busy).

Change-Id: Ib937006abf8bedb60891a739acd733e89b732ae0
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: set at least hispeed when above hispeed load

If load is above go_hispeed_load, always go to at least hispeed_freq,
even when reducing speed from a higher speed, not just when jumping
up from minimum speed.  Avoids running at a lower than intended
speed after a burst of even higher load.

Change-Id: I5b9d2a15ba25ce609b21bac7c724265cf6838dee
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: don't drop speed if recently at higher load

Apply min_sample_time to the last time the current target speed
was originally requested or re-validated as appropriate for the
current load, not to the time since the current speed was
originally set.  Avoids periodic dips in speed during bursty
loads.

Change-Id: I250bda657985de60373f9897cc41f480664d51a1
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: Remove redundant include
Rerverted interactive commits
cpufreq interactive governor: event tracing

Change-Id: Ic13614a3da2faa2d4bd215ca3eb7191614f0cf66
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: apply intermediate load to max speed not current

Evaluate spikes in load (below go_hispeed_load) against the maximum
speed supported by the device, not the current speed (which tends to
make it too difficult to raise speed to intermediate levels until
very busy).

Change-Id: Ib937006abf8bedb60891a739acd733e89b732ae0
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: set at least hispeed when above hispeed load

If load is above go_hispeed_load, always go to at least hispeed_freq,
even when reducing speed from a higher speed, not just when jumping
up from minimum speed.  Avoids running at a lower than intended
speed after a burst of even higher load.

Change-Id: I5b9d2a15ba25ce609b21bac7c724265cf6838dee
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: don't drop speed if recently at higher load

Apply min_sample_time to the last time the current target speed
was originally requested or re-validated as appropriate for the
current load, not to the time since the current speed was
originally set.  Avoids periodic dips in speed during bursty
loads.

Change-Id: I250bda657985de60373f9897cc41f480664d51a1
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: Remove redundant include
cpufreq: interactive: configurable delay before raising above hispeed

Change-Id: I4d6ac40b23a3790d48e30c37408284e9f955e8fa
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: adjust code and documentation to match

Change-Id: If59c668d514a29febe5c35404fd9d01df8548eb1
Signed-off-by: Todd Poynor <toddpoynor@google.com>
cpufreq: interactive: based hispeed bump on target freq, not actual

For systems that set a common speed for all CPUs, checking current
speed here could bypass the intermediate hispeed bump decision for
this CPU when another CPU was already at hispeed.  This could
result in an overly high setting (for all CPUs) in situations
where all CPUs were about to drop to load levels that map to
hispeed or below.

Change-Id: I186f23dcfc5e2b6336cab8b0327f0c8a9a4482bc
Signed-off-by: Todd Poynor <toddpoynor@google.com>