arm_boot: Conditionalised DTB command line update

The DTB command line should only be overwritten if the user provides a command
line with -append. Otherwise whatever command line was in the DTB should stay
unchanged.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
configure: fix -enable-debug with newer toolchains

Fedora 17's toolchain wants optimization enabled for _FORTIFY_SOURCE;
so disable _FORTIFY_SOURCE when debugging.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
make: automatically include dependencies in recursive subdir rules (v2)

I think I understand enough of what's going on in these rules to ensure this is
right.  But I could certainly use a second or third opinion...

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Add PIIX4 properties to control PM system states.

This patch adds two things. First it allows QEMU to distinguish between
regular powerdown and S4 powerdown. Later separate QMP notification will
be added for S4 powerdown. Second it allows S3/S4 states to be disabled
from QEMU command line. Some guests known to be broken with regards to
power management, but allow to use it anyway. Using new properties
management will be able to disable S3/S4 for such guests.

Supported system state are passed to a firmware using new fw_cfg file.
The file contains  6 byte array. Each byte represents one system
state. If byte at offset X has its MSB set it means that system state
X is supported and to enter it guest should use the value from lowest 3
bits.

Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Allow machines to configure the QEMU_VERSION that's exposed via hardware

QEMU exposes its version to the guest's hardware and in some cases that is wrong
(e.g. Windows prints messages about driver updates when you switch
the QEMU version).
There is a new field now on the struct QEmuMachine, hw_version, which may
contain the version that the specific machine should report. If that field is
set, then that machine will report that version to the guest.

Signed-off-by: Crístian Viana <vianac@linux.vnet.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
target-arm: Fix 11MPCore cache type register value

Make the 11MPCore report a valid value in its cache type register
(the previous value appears to have been incorrectly copied from
the 1136/1176). In particular, do not report that we have an
aliasing VIPT cache, because this causes Linux to attempt to use
the v6 block cache ops which the 11MPCore doesn't actually have.
(This causes no problems currently because we over-broadly provide
those ops on all cores, but prevents us correctly narrowing the
block ops down to those cores which actually implement them.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: initial coprocessor register framework

Initial infrastructure for data-driven registration of
coprocessor register implementations.

We still fall back to the old-style switch statements pending
complete conversion of all existing registers.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/pxa2xx: Convert cp14 perf registers to new scheme

Convert the PXA2xx cp14 perf registers from old-style
coprocessor hooks to the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/pxa2xx.c: Convert CLKCFG and PWRMODE cp14 regs

Convert the PXA2xx CLKCFG and PWRMODE cp14 registers to the
new arm_cp_reginfo scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/pxa2xx_pic: Convert coprocessor registers to new scheme

Convert the coprocessor access functions for the pxa2xx PIC to the
arm_cp_reginfo scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Remove old cpu_arm_set_cp_io infrastructure

All the users of cpu_arm_set_cp_io have been converted, so we
can remove it and the infrastructure it used.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Add register_cp_regs_for_features()

Add new function register_cp_regs_for_features() as a place to
register coprocessor registers dependent on feature flags.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Convert debug registers to cp_reginfo

Convert the cp14 debug registers (DBGDIDR, DBGDRAR, DBGDSAR) to the
cp_reginfo scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Convert TEECR, TEEHBR to new scheme

Convert the THUMB2EE cp14 registers TEECR and TEEHBR to
use arm_cp_reginfo.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Convert WFI/barriers special cases to cp_reginfo

Convert the various WFI and barrier instruction special cases to use
cp_reginfo infrastructure.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Convert TLS registers

Convert TLS registers to the new cp15 framework

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Convert performance monitor registers

Convert the v7 performance monitor cp15 registers to
the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Convert generic timer cp15 regs

Convert the (dummy) generic timer cp15 implementation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Convert cp15 c3 register

Convert the cp15 c3 register (MMU domain access control
or MPU write buffer control). NB that this is horribly
underdecoded for modern cores (should be crn=3,crm=0,
opc1=0,opc2=0) but this change preserves the existing
QEMU behaviour.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: Convert MMU fault status cp15 registers

Convert the MMU fault status and MPU access permission cp15
registers to the new scheme.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>