ARM: tegra: power: Trim Tegra3 hotplug timings
Bug 945921
Reduce delays in going LP->G and G->Gn

Change-Id: I10f68196cb64ea20461000e9b0d64999fd714395
Reviewed-on: http://git-master/r/88169
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
ARM: tegra: power: Update Tegra3 auto-hotplug states

Updated Tegra3 auto-hotplug state machine:

- no longer enter down state on LP CPU (there is no down path on LP)
- no longer enter idle state on G CPU (since load distribution between
G cores may change without CPU frequency change, continue polling)
- allow only disabled or idle state to be set via auto-hotplug sysfs
node, and synchronize with cpufreq governor in the latter case

Change-Id: Ibb93ddca852bbe1341fc5c52b0c83c16e9963e9d
Signed-off-by: Alex Frid <afrid@nvidia.com>
ARM: tegra: power: Support minimum on-line cpus limit

Updated Tegra3 auto-hotplug mechanism to keep minimum number of
on-line cpus above the limit specified by the PM QoS parameter
PM_QOS_MIN_ONLINE_CPUS.

Added respective debugfs node /kernel/debug/tegra_hotplug/min_cpus.

Bug 940061
ARM: tegra: power: Use CPU G mode in suspend prepare

Switch to CPU G mode in Tegra3 suspend prepare if CPU suspend
rate is high enough. By symmetry, it guarantees that device
resume will be happening in G mode as well.

Bug 946301
cpuidle: governor: menu: don't use loadavg

get_loadavg doesn't work as intended.  According to the comments, it
should be returning an average over a few seconds, but it is actually
reading the instantaneous load.  It is almost always returning 0, but
can sometimes, depending on workload, spike very high into the hundreds
even when the average cpu load is under 10%.  Disable it for now.

Signed-off-by: Colin Cross <ccross@android.com>
i2c: Allow i2c_add_numbered_adapter() to assign a bus id

Currently, if an i2c bus driver supports both static and dynamic bus
ids, it needs to choose between calling i2c_add_numbered_adapter() and
i2c_add_adapter().  This patch makes i2c_add_numbered_adapter()
redirect to i2c_add_adapter() if the requested bus id is -1.
Bluetooth: Check return value of hci_recv_stream_fragment()
It may return error and in this case we do add to the stats.
Signed-off-by: Gustavo F. Padovan <padovan@profusion.mobi>

Bluetooth: Update Kconfig (shaky156 updated text)
arm: tegra: la: Fix the register offset for G2_1
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>

arm: tegra: la: change default LA for 2D
Decrease the priority for 2D operations so they do not compete with
display.
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
ARM: tegra: Co-locate all GIC functions

Move Tegra GIC initialization to be with the other GIC functions.

Change-Id: I9b23757d135f3a9062f21fccb816c745ce8add43
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/78829
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: Tegra: fuse: Add A04 revision
arm: tegra: Clock audio from clk_m

Clock audio from clkm as a pre-condition of disabling pllp_out1 and plla
when I2S is in slave mode.
board-cardhu: use proper rate (thanks shaky156)
PM Qos: Add min online cpus as PM QoS parameter
Reference:
http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commitdiff;h=566594ce3b1dbfc8397a62826992a0794612f51a
Increased EMC, graphics, and UART clocks maximum limits
Updated PLLC configuration table

Reference:
http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commitdiff_plain;h=76ae82be48f2b256f55e6ddbdf00b91088b4ba3d
mach-tegra:
removed unused directive .size from __tegra_cpu_reset_handler
security: trusted foundations: fix coarse_page_table_array init

On the first allocation of a coarse page array, explicitly set the
ref_count to 1, rather than incrementing (as the allocator used may
not guarantee a zero initted struct).

Bug 928289
ARM: tegra: clock: Increase Tegra3 EACK countdown
http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=commitdiff;h=1c42e0f4299952b7d8a93bc0cf1178a5d9f0329c
tegra3-dvfs: voltage adjustments

-reference Nvidia git android-tegra-nv-3.1
ARM: tegra: clock: Auto-detect PLLP rate in kernel uncompress

Tegra3 platform may boot with one of the predefined fixed PLLP
(peripheral PLL) output rates: 216MHz, 408MHz, or 204MHz. This
commit implements auto-detection of PLLP rate, and debug uart
configuration during kernel uncompressing.
tegra3 clocks: 

-clk cbus round rate fix - update min now, since no dvfs table was
available during init (skip placeholder entries set to 1 kHz)

-tweak frequency table