serial: sh-sci: modify sci_break_ctl()

SCIF modules which have SCSPTR can output the break signal. Now that we
have a way of determining port features/capabilities, add trivial break
control via SCSPTR support. Tested on sh7757lcr.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: kgdb: Fix up basic SMP support.

kgdb needs a kgdb_roundup_cpus() definition in the architecture backend,
so just copy over the MIPS version, which already does what we want.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: kgdb: Individual register get/set support.

This updates sh following the generic kgdb changes adding support
for individual register get/set for kgdb/kdb use.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: kgdb: Fill out sleeping_thread_to_gdb_regs() state.

Presently we're using a pretty dumbed-down implementation that copies
over register state visible from the thread info, leaving the bulk of the
switch_to state uncopied.

Given that we're also depending on register bank toggling for switch_to
optimization we ought to also explicitly zero out the GP regs that reside
in an alternate bank in order to prevent handing back garbage.

There are a few extra registers that we have state for in switch_to, so
copy those over while we're at it.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: kgdb: Fix up NULL pointer deref by kgdb_nmicallback.

kgdb_nmicallback expects valid register state, so just fetch the register
state with get_irq_regs() as on other platforms.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: kgdb: Unset CACHE_FLUSH_IS_SAFE for SMP.

Our SMP cache flush ops use CPU cross calls to deal with things
like I-cache accesses not being broadcast in hardware, so ensure that
the CACHE_FLUSH_IS_SAFE reflects this.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: clkfwk: Support variable size accesses for MSTP clocks.

The bulk of the MSTP users require 32-bit access, but this isn't the case
for some of the SH-2A parts, so add in some basic infrastructure to let
the CPU define its required access size in preparation.

Requested-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh/mm/fault_32.c: Port OOM changes to do_page_fault

Commit d065bd810b6deb67d4897a14bfe21f8eb526ba99
(mm: retry page fault when blocking on disk transfer) and
commit 37b23e0525d393d48a7d59f870b3bc061a30ccdb
(x86,mm: make pagefault killable)

The above commits introduced changes into the x86 pagefault handler
for making the page fault handler retryable as well as killable.

These changes reduce the mmap_sem hold time, which is crucial
during OOM killer invocation.

Port these changes to the 32-bit SH platform.

Signed-off-by: Kautuk Consul <consul.kautuk@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh64: Port OOM changes to do_page_fault

Reflect the sh32 OOM changes for the sh64 page fault handler, too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh64: Kill off dead page fault debug cruft.

In the future we'll be unifying some of the 32/64 page fault path, so
start to tidy up the _64 one by killing off some of the unused debug
cruft.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
MAINTAINERS: Update git URL for SH.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
serial: sh-sci: Update break_ctl handling for all SCSPTR-capable regtypes.

This updates the earlier break_ctl support regardless of regtype so long
as the requisite SCSPTR exists. This is the same approach used by
sci_init_pins() for providing a generic solution now that we're able to
detect register capabilities on a per-port basis.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: clkfwk: Support variable size accesses for div4/div6 clocks.

This follows the MSTP clock change and implements variable access size
support for the rest of the CPG clocks, too. Upcoming SH-2A support has
need of this for 16-bit div4 clocks, while others will follow.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Merge branch 'common/clkfwk' into sh-latest
sh: sh4a: Change the specification method of IRQ to SCIx_IRQ_MUXED

Some SCIF devices specify the same IRQ. We can use SCIx_IRQ_MUXED for this.
And change use to evt2irq(), without specifying the value of IRQ directly.
This is correction to the SH4A series.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: sh4: Change the specification method of IRQ to SCIx_IRQ_MUXED

Some SCIF devices specify the same IRQ. We can use SCIx_IRQ_MUXED for this.
And change use to evt2irq(), without specifying the value of IRQ directly.
This is correction to the SH4 series.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: sh3: Change the specification method of IRQ to SCIx_IRQ_MUXED

Some SCIF devices specify the same IRQ. We can use SCIx_IRQ_MUXED for this.
And change use to evt2irq(), without specifying the value of IRQ directly.
This is correction to the SH3 series.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: sh2: Change the specification method of IRQ to SCIx_IRQ_MUXED

Some SCIF devices specify the same IRQ. We can use SCIx_IRQ_MUXED for this.
This is correction to the SH2/SH2A series.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: Add initial support for SH7734 CPU subtype

This implements initial support for the SH7734.
This adds support SCIF, TMU and RTC.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: Add support pinmux for SH7734

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>