AM335x: FIX BCH8 error correction

BCH8 error correction module was wrongly handling in following steps.
1. Method for calculation of the error location.
2. Loading of syndrome polynomial for ELM module.
3. Enabling of GPMC ECC engine done.
This patch fixes the same.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
omap3beagle: Drop to 800MHz

This is the highest frequency supported on xM without BIAS drivers.

Signed-off-by: Tom Rini <trini@ti.com>
ddr_defs: change DDR timings for 15x15 EVM

* For cold silicon the DDR timings need to be relaxed in order for
  the device to boot with DDR at 266MHz
* Fix proposed by James Doublesin

Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
am335x: Enable RTC 32K OSC clock

In order to support low power state, you must source kernel
system timers to persistent clock, available across suspend/resume.
In case of AM335x device, the only source we have is, RTC32K, available
in wakeup/always-on domain.
Having said that, during validation it has been observed that, RTC clock
need couple of seconds delay to stabilize the RTC OSC clock;
and such a huge delay is not acceptable in kernel especially during
early init and also it will impact quick/fast boot use-cases.

So, RTC32k OSC enable dependency has been shifted to SPL/first-bootloader.

In Kernel, in order to support older u-boot version/releases we have
adopted fallback mechanism; where, if timer goes into bad state OR
becomes idle, then we again switch back to main/default sys_ck_in (24MHz).

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
CC: Tom Rini <trini@ti.com>
BACKPORT: Improve SPL support for am33xx device

This is a backport from mainline (as of 24c6899).  We now dynamically
determine if we are a FAT or RAW MMC device.

Signed-off-by: Tom Rini <trini@ti.com>
am335x: Add support for MMC1

We now always support HSMMC0 and HSMMC1.  If HSMMC1 is usable will
depend on the hardware configuration.

Signed-off-by: Tom Rini <trini@ti.com>
spl: display_options.o is required for SPI flash support in SPL

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
sf: Add spi_boot() to allow booting from SPI flash in an SPL

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
omap: spl: fix build break due to changes in FAT

FAT library now uses malloc() and free(). But SPL doesn't
have heap until now. Setup a heap in SDRAM to fix this issue.

However this increases SPL footprint beyond the available SRAM
budget. So, compile out some fancy features in the SDARM init
bring back footprint under control

CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Wolfgang Denk <wd@denx.de>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Various: Add SPL malloc defines

Signed-off-by: Tom Rini <trini@ti.com>
omapimage: Add support for byteswapped SPI images

Signed-off-by: Tom Rini <trini@ti.com>
ti81xx: Add SPI SPL support

Signed-off-by: Tom Rini <trini@ti.com>
am335x evm: Add SPI SPL as an option

Signed-off-by: Tom Rini <trini@ti.com>
am335x evm: Add am335x_evm_spiboot target

This target will disable SPL for SD/MMC and NAND and place the
environment in SPI flash rather than NAND.

Signed-off-by: Tom Rini <trini@ti.com>
am335x: use readl & writel instead of __raw_readl & __raw_writel

On ARMv7 cores, device memory mapped as Normal Non-cacheable, may not
guarantee ordered access causing failures in device drivers that do not
use the mandatory memory barriers. readl & writel versions contain
necessary memory barriers for this.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
am335x: Remove legacy 13x13 board support

Support for 13x13 board was added during Bring-up process. Now this
board isn't used by anyone anymore. So remove the code as well.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
am335x: correct rtc clock enable checking

SPI0 clock was checked for readyness instead of RTC. This patch corrects
the same.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM

At old overo boards TWL4030 RTC irq is connected to gpio112. Unfortunately
this pin is also used for revision detection. Therefore we need to send
shut-up to TWL4030 to avoid reading wrong revision. In SPL this must
be done before SDRAM is set up because the type of SDRAM is revision dependent.
By this patch it is ensured that all variables used by omap24xx_i2c.c are
located in SRAM.

Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
drivers/i2c/omap24xx_i2c.c: part 2 move all local variables to SRAM

I2C module may be called even before relocation. By this patch it is
ensured that all variables used by omap24xx_i2c.c are located in SRAM.

This patch is based on the upstream patch. the same is applied for
am335x part of driver as well.

http://git.denx.de/?p=u-boot.git;a=commitdiff;
h=0b620ec97e05ddb09714d127a7880333fc4008fb

drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
am335x: move i2c pin-mux variables to .data section

i2c api (probe, read) may be called at early stages i.e., even before
relocation. So set up i2c pin-mux variables into proper .data sections.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>