i965: Add support for AVG instruction.

From the Ivy Bridge PRM, Vol4 Part3 p152:

    "The avg instruction performs component-wise integer average of
    src0 and src1 and stores the results in dst. An integer average
    uses integer upward rounding. It is equivalent to increment one to
    the addition of src0 and src1 and then apply an arithmetic right
    shift to this intermediate value."

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
i965/blorp: Modify manual_blend() to avoid unnecessary loss of precision.

When downsampling from an MSAA image to a single-sampled image, it is
inevitable that some loss of numerical precision will occur, since we
have to use 32-bit floating point registers to hold the intermediate
results while blending.  However, it seems reasonable to expect that
when all samples corresponding to a given pixel have the exact same
color value, there will be no loss of precision.

Previously, we averaged samples as follows:

    blend = (((sample[0] + sample[1]) + sample[2]) + sample[3]) / 4

This had the potential to lose numerical precision when all samples
have the same color value, since ((sample[0] + sample[1]) + sample[2])
may not be precisely representable as a 32-bit float, even if the
individual samples are.

This patch changes the formula to:

    blend = ((sample[0] + sample[1]) + (sample[2] + sample[3])) / 4

This avoids any loss of precision in the event that all samples are
the same, by ensuring that each addition operation adds two equal
values.

As a side benefit, this puts the formula in the form we will need in
order to implement correct blending of integer formats.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
i965/blorp: Fix integer downsampling on Gen7.

When downsampling an integer-format buffer on Gen7, we need to use the
"avg" instruction rather than the "add" instruction, to ensure that we
don't overflow the range of 32-bit integers.  Also, we need to use the
proper register type (BRW_REGISTER_TYPE_D or BRW_REGISTER_TYPE_UD) for
intermediate color data and for writing to the render target.

Note: this patch causes blorp to use the proper register type for all
operations (downsampling, upsampling, and ordinary blits).  Strictly
speaking, this is only necessary for downsampling, because the other
operations exclusively use MOV instructions on the color data.  But
it's simpler to use the proper register type in all cases.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
i965/blorp: Optimize manual_blend() for compressed multisampled surfaces.

When downsampling a compressed multisampled surface, we can take a
shortcut to downsample any pixels that were completely covered by a
single primitive.  In this case, the first color value we fetch is the
correct final color for the downsampled pixel, so we can skip the rest
of the blending operation.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
i965/blorp: Configure SURFACE_STATE correctly for IMS surfaces.

This patch modifies gen7_set_surface_num_multisamples() to set up the
SURFACE_STATE appropriately for texturing from IMS format MSAA
surfaces (which are only used on Gen7 for depth and stencil buffers).
Since the function now sets more than just the number of multisamples,
it's been renamed to gen7_set_surface_msaa().

This will make it possible to remove some kludginess from the blorp
engine.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
i965/blorp: Loosen assertions in compute_msaa_layout_for_pipeline.

Previously, on Gen7, compute_msaa_layout_for_pipeline() would verify
that IMS layout is not used.  However, now that we configure
SURFACE_STATE correctly for IMS surfaces, IMS layout is available.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
i965/blorp: Use IMS layout when texturing from depth/stencil surfaces.

Previously, on Gen7, when texturing from a depth or stencil surface,
the blorp engine would configure the 3D pipeline as though the input
surface was non-multisampled, and perform the necessary coordinate
transformations in the fragment shader to account for the IMS layout.
This meant outputting a lot of extra fragment shader code, and it
raised some uncertainty about how to deal with very large surfaces.

This patch modifies blorp to configure the 3D pipeline properly for
IMS layout when reading from depth and stencil surfaces.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
msaa: Compute visual samples/sampleBuffers from all buffers.

This patch ensures that Visual.samples and Visual.sampleBuffers are
set correctly even in the case where there is no color buffer.
Previously, these values would retain their default value of 0 in this
circumstance, even if the depth or stencil buffer was multisampled.
i965/msaa: Control multisampling behaviour via the visual.

Previously, we used the number of samples in draw buffer 0 to
determine whether to set up the 3D pipeline for multisampling.  Using
the visual is cleaner, and has the benefit of working properly when
there is no color buffer.

Fixes all piglit tests "EXT_framebuffer_multisample/no-color" on Gen7.
On Gen6, the "depth-computed" variants of these tests still fail; this
will be addresed in a later patch.
i965: Set width, height, and tiling properly for null render targets.

The HW docs say that the width and height of null render targets need
to match the width and height of the corresponding depth and/or
stencil buffers, and that they need to be marked as Y-tiled.  Although
leaving these values at 0 doesn't seem to cause any ill effects, it
seems wise to follow the documented requirements.
i965/msaa: Work around problems with null render targets on Gen6.

On Gen6, multisampled null render targets don't seem to work
properly--they cause the GPU to hang.  So, as a workaround, we render
into a dummy color buffer.

Fortunately this situation (multisampled rendering without a color
buffer) is rare, and we don't have to waste too much memory, because
we can give the workaround buffer a very small pitch.

Fixes piglit test "EXT_framebuffer_multisample/no-color {2,4}
depth-computed *" on Gen6.
i965/blorp: Simplify check that src/dst width/height match.

When checking that the source and destination dimensions match, we
don't need to store the width and height in variables; doing so just
risks confusion since right after the check, we do clipping and
scissoring, which may alter the width and height.

No functional change.
i965/blorp: Fixup scissoring of blits to window system buffers.

This patch modifies the order of operations in the blorp engine so
that clipping and scissoring are performed before adjusting the
coordinates to account for the difference in origin convention between
window system buffers and framebuffer objects.  Previously, we would
do clipping and scissoring after adjusting for origin conventions, so
we would get scissoring wrong in window system buffers.

Fixes Piglit test "fbo-scissor-blit window".
i965/blorp: Don't fall back to swrast when miptrees absent.

Previously, the blorp engine would fall back to swrast if the source
or destination of a blit had no associated miptree.  This was
unnecessary, since _mesa_BlitFramebufferEXT() already takes care of
making the blit silently succeed if there are no buffers bound, so the
fallback paths could never actually happen in practice.

Removing these fallback paths will simplify the implementation of
correct DrawBuffers support in blorp.
i965/blorp: Rearrange order of blit validation and preparation steps.

This patch rearranges the order of steps performed by a blorp blit
from this:

- Sync up state of window system buffers.
- Find buffers.
- Find miptrees.
- Make sure buffer formats match.
- Handle mirroring.
- Make sure width and height match.
- Handle clipping/scissoring.
- Account for window system origin conventions.
- Do depth resolves, if applicable.
- Do the blit.
- Record the need for a future HiZ resolve, if applicable.

To this:

- Sync up state of window system buffers.
- Handle mirroring.
- Make sure width and height match.
- Handle clipping/scissoring.
- Account for window system origin conventions.
- Find buffers.
- Make sure buffer formats match.
- Find miptrees.
- Do depth resolves, if applicable.
- Do the blit.
- Record the need for a future HiZ resolve, if applicable.

The steps are the same, but they are now performed in an order that
will make it possible to implement correct DrawBuffers support.  Note
that the last four steps are now in a separate function
(do_blorp_blit), since they will need to be executed repeatedly when
DrawBuffers support is added.
i965/blorp: Handle DrawBuffers properly.

When the client program uses glDrawBuffer() or glDrawBuffers() to
select more than one color buffer for drawing into, and then performs
a blit, we need to blit into every single enabled draw buffer.

+2 oglconforms.
i965/msaa: Remove comment about falsely claiming to support MSAA.

Gen6+ hardware now supports MSAA properly.
mesa: Make more consistent use of _mesa_is_{user,winsys}_fbo()

A lot of code was still differentiating between between winsys and
user fbos by testing the fbo's name against zero.  This converts
everything in core mesa, the state tracker, and src/mesa/program over
to use _mesa_is_user_fbo() and _mesa_is_winsys_fbo().
intel: Make more consistent use of _mesa_is_{user,winsys}_fbo()

A lot of code was still differentiating between between winsys and
user fbos by testing the fbo's name against zero.  This converts
everything in the i915 and 965 drivers over to use _mesa_is_user_fbo()
and _mesa_is_winsys_fbo().
i965/blorp: Parameterize manual_blend() by num_samples.

This patch adds a num_samples argument to the blorp function
manual_blend(), allowing it to be told how many samples need to be
blended together.  Previously it assumed 4x MSAA, since that was all
we supported.

We also bump up LOG2_MAX_BLEND_SAMPLES from 2 to 3, so that
manual_blend() will be able to handle 8x MSAA.