p3: wm8994_p3: add voodoo

-modify Makefile/Kconfig accordingly
p3_battery: enable usb charging

- export /sys/class/power_supply/battery/force_usb_charging
drivers: power: p3_battery: export batt_current to sysfs
power: p3_battery: change attribute to charging_mode_booting for LPM
tegra: p3-power: invoke regulator_has_full_constraints

-reference galaxy-2636
board-p3: fix warning regarding escape sequence
defconfig: ics: add p3-ics config
mmc: host: tegra/omap: remove MMC_CAP_ERASE
mmc: Instrument and disable mmc_erase()

Instrument mmc_erase() so that it prints an error when something
attempts to use it.  This lets us determine if something called
it.

Also disable it so it doesn't actually do anything.

-remove unused rem and to in mmc_erase (core)
 https://github.com/pershoot/galaxy-2636/commit/4a8b369074253dc5d108bfd8889c4038eecde823#drivers/mmc/core/core.c
mmc:host:tegra: make embedded sdio code conditional

Enable embedded sdio code, iff MMC_EMBEDDED_SDIO
Kconfig is on.

Bug 956238

Change-Id: I16539f5cad5fc66082af2f569ea36a54c12457e3
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/90655
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
drivers: resolve compilation time warnings

bug 949219

Change-Id: I5942ba86bd1cbe1f1bd06a7c9f51a10d83e6cabb
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/92819
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>

Conflicts:

	drivers/input/touchscreen/rmi4/rmi_bus.c
	drivers/input/touchscreen/rmi4/rmi_spi.c

-condition *udev on LINK_DEVICE_HSIC
mmc: host: Disable SDIO card clock when idle

Disable SDIO card clock when there are no commands/
data transfers on the SD bus.

Bug 958954
Bug 955742
Bug 952344

Change-Id: I7390be0406f7e46c0eb88ede2ae6f904b2181306
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/95390
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
mmc: tegra: Disable card and host clk separately

Disable card clock before disabling internal clock to
ensure that there are no abnormal clock waveforms.

Bug 947058

Change-Id: I98a3f7f63b4380b62bead05f1018d3cddc0ac217
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/95396
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
mmc: tegra: enable MMC_PM_IGNORE_PM_NOTIFY

enable MMC_PM_IGNORE_PM_NOTIFY for all sd instances

Bug 956238
Bug 932086

Change-Id: I4d455e480eabace403719f1813d97abfa4d01924
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/96071
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
mmc: host: Disable SDIO card clock when idle for Tegra 3 only

The CL disables SDIO card clock when idle for Tegra 3 only.

Bonus: conditional build for some tegra 3 functionalities.

Bug 975541

Change-Id: I097c4771f3565bf9137d7854ada10c1fe8535056
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/99707
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Peer Chen <pchen@nvidia.com>
mmc: host: loglevel of a message to KERN_INFO

Some boards don't have a vddio regulator for few rails hence not getting
the regulator handle. And we assume that those rails are always powered.
Hence rephrased the error message and lowered the loglevel to KERN_INFO.

Bug 976177

Change-Id: I92b82f75934eaf7137584a625065e3389b6ae1b7
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/100490
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Conflicts:

	drivers/mmc/host/sdhci-tegra.c
mmc: core: Abort failed transfer before retries

Retries should be done only after abort command
is issued for the current failed transfer. The block
layer already has an implementation for retrying.
No need for the extra retries.

Bug 961761
Bug 922239

Change-Id: I07f60e85e093b725007727833739013f8fd66d43
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100563
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>

Conflicts:

	drivers/mmc/card/block.c
mmc: tegra: Fix SDR50 mode clock rate setting

In SDR50 mode, set the controller clock to double
the requested clock to ensure that the core voltage
is maintained at a min of 1.2V.

Bug 965298

Change-Id: I557a07de97efd6b44f812a11da657e03d3ddefd0
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/101522
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

Conflicts:

	drivers/mmc/host/sdhci-tegra.c
arm: tegra: sdhci: Define ddr50 clock limit

Added a new variable in sdhci platform data
which will limit the ddr50 mode clock.

Bug 967719

Change-Id: I3f55b55651362447845c2e1d5000939e3e028df6
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100569
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
mmc: tegra: Set eMMC DDR clock based on emc clock

Set the eMMC ddr mode clock dynamically based on emc
clock rate. If ddr clock limit is specified and the emc
clock is less than max emc freq, then limit emmc ddr
clk. If not, set the max eMMC ddr clock.

Bug 967719

Change-Id: I9f70077c4ac4bb1f3e6d894fcb8420b1aba284dd
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100579
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>