mmc: msm_sdcc: Add software command timeout support

There might be cases where the controller may be bad and the
interrupts might be missed due to which the requests will be
stalled indefinitely. Also some bad cards don't come out of
programming state holding the prog_done line asserted and
mmcqd thread stall indefinitely waiting for prog_done interrupt.

Handle these cases with software timeouts in the driver file.
Specification defines the timeout value to be much less than 10secs
(around 1 sec) but we set the software command timeout to this
value to handle the controller/card which don't meet the standards.

Change-Id: Ic4635ba89e92eb4712b3e55e0f9ff11e9c6c2466
Signed-off-by: Sujith Reddy Thumma <sthumma@codeaurora.org>
mmc: msm_sdcc: Enable SDIO wakeup IRQ only if clocks are turned off

The SDIO wakeup IRQ is required for SDIO devices only when SDCC clocks
are turned off during suspend. Thus, enable it only when clocks are
turned off.

Change-Id: Ibea5b3147dc2e71587654d2366872dffbfc878c2
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
mmc: msm_sdcc: Check for card presence during system resume

SDC controllers which support hardware detection the interrupt
generated due to insertion of SD card during suspend will be missed
as the corresponding irq is disabled during suspend. The driver remembers
the old eject status of the GPIO line (before suspend) and do not allow
any new requests (to detect the card) after resume even if the card is
present. Fix this by checking the GPIO status during resume and update
the flags so that card detection can happen if the card is present
after resume.

CRs-Fixed: 276417
Change-Id: I0e677ef6b3269dccd3a70283c592ca629104da3f
Signed-off-by: Sujith Reddy Thumma <sthumma@codeaurora.org>

Conflicts:

	drivers/mmc/host/msm_sdcc.c
mmc: msm_sdcc: write max. MCI_TXFIFOHALFEMPTY bytes

For larger TX transaction (of say more than 1KBytes),
driver continuously writes MCI_FIFOSIZE (64) number of
bytes into controller FIFO everytime in a loop
if MCI_TXFIFOEMPTY flag is set.

But with this approach, controller is getting stuck
(with MCI_STATUS register showing that TXACTIVE and
MCI_DATA_COUNT register showing that few bytes are
left for this transfer) after driver writes all
data bytes (of a TX transaction) into FIFO.

To workaround this issue, driver should always
write MCI_FIFOHALFSIZE (32) number of bytes at
a time to controller FIFO if MCI_TXFIFOEMPTY or
MCI_TXFIFOHALF_EMPTY flag is set MCI_STATUS register.

Change-Id: Ic8e39e291e3eef5c2c7348d3fcf6e4ffe1620e93
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
msm_sdcc: Modify the max_blk_count value to prevent overflow.

CRs-Fixed: 275988
Change-Id: I0a1cdee060cdbd725e39615158eec5036d1e85d6
Signed-off-by: Murali Palnati <palnatim@codeaurora.org>
mmc: msm_sdcc: Mask off SDCC interrupts during suspend for SDIO devices

SDCC interrupts should be disabled before disabling SDCC clocks during
suspend for SDIO devices. If we don't mask off these interrupts during
suspend, then there is a possible race between these interrupts and
set_ios() during resume. There is a chance that we get SDCC interrupt
as soon as clocks are enabled but before they are stabilized during
resume. Thus, we disable SDCC interrupts during suspend and enable them
back only after clocks are enabled and stabilized.

Change-Id: I0e904880db2110831d5403aefedf3b23a98745bf
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>