msm_fb: display: return fail if pipe still staged

Pipe is not un-staged from mixer when it is unset.
It expects a pan_display() to un-stage it out of mixer.
Return fail at overlay_set() if pipe was still stage
at mixer.

CRs-fixed: 399193, 393979
Change-Id: I562f6e133bb239b30f4f53669dbf1cc5ddf80d02
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: Add pseudo-planar 422 H1V2 support in the MDP4

Rotator outputs pseudo-planar 422 H1V2 for interleaved inputs
on 90 degree rotation. Add changes to support MDP_Y_CRCB_H1V2
in MDP4.

CRs-Fixed: 371303
Change-Id: I8083bf44f9e2addf9e8732268147c1c3f6c0e2af
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm_fb: display: Program source address registers correctly

Scale filter FIR uses the adjacent pixels as part of the
processing. Source address registers should be program such that
they point to the first valid pixel so that non-ROI pixels are
ignored. This is done by making source x,y offsets to zero and
adding the computed offset to source address.

CRs-Fixed: 380020
Change-Id: I998fdd46f39dc67f32c422ec209da59d1add2e95
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
msm: rotator: Add pseudo-planar 422 H1V2 dst format for MDP4

For interleaved 422 inputs, rotator outputs MDP_Y_CRCB_H1V2
format on 90 degree rotation. Add support as destination format
for MDP4.

CRs-Fixed: 371303
Change-Id: Ie0f98d40f58bf2cb9bc3298a94cae9c4e89b2f7a
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
d2: Update defconfigs

Change-Id: I53528d9e7f1de07a4d337b1150e510180893398d
cpufreq: interactive: pin timers to associated CPU

Helps avoid waking up other CPUs to react to activity on the local CPU.

Change-Id: Ife272aaa7916894a437705d44521b1a1693fbe8e
Signed-off-by: Todd Poynor <toddpoynor@google.com>

cpufreq: interactive: use deferrable timer by default

Avoid wakeups only to handle the governor timer when the system is otherwise
idle.

For platforms where the power cost of remaining in idle at higher CPU
speed may outweigh the cost of a governor wakeup from idle to lower the speed,
set parameter cpufreq_interactive.governidle=1.

Change-Id: Id6c43eb35caecf9b0574fcdd5b769711bc7e6de6
Signed-off-by: LianWei WANG <a22439@motorola.com>
Signed-off-by: Todd Poynor <toddpoynor@google.com>

cpufreq: interactive: kick timer on idle exit past expiry

The deferrable timer list isn't checked on all idle exits, such as when
hi-res timers expire or ISRs schedule workers.  If the idle loop is
exited and it's past time to run the governor load polling timer,
run it immediately.  This ensures we handle load spikes caused by actvity
that does not run the normal timer list.

Rename the field that timestamps the "time_in_idle" value to be more
accurate.

Change-Id: Ied590ecbefc83c9a9ec5eb9e31903557f6fa1614
Signed-off-by: Todd Poynor <toddpoynor@google.com>

cpufreq: interactive: trace actual speed in target speed decisions

Tracing adds actual speed since this is expected to be key to the
choice of target speed.

Change-Id: Iec936102d0010c4e9dfa143c38a9fd0d551189c3
Signed-off-by: Todd Poynor <toddpoynor@google.com>

cpufreq: interactive: change speed according to current speed and target load

Add a target_load attribute that specifies how aggressively the governor is
to adjust speed to meet the observed load.  New target speed is calculated
as the current actual speed (may be higher than target speed on SMP) times
the CPU load (as a fraction) divided by target load (fraction).

cpufreq_frequency_table_target() call use CPUFREQ_RELATION_L to set
the next higher speed rather than next lower speed.

Change-Id: If432451da82f5fed12e15c9421d7d27792376150
Signed-off-by: Todd Poynor <toddpoynor@google.com>

cpufreq: interactive: apply above_hispeed_delay to each step above hispeed

Apply above_hispeed_delay whenever increasing speed to a new speed above
hispeed (not just the first step above hispeed).

Change-Id: Ibb7add7db47f2a4306a9458c4e1ebabb60698636
Signed-off-by: Todd Poynor <toddpoynor@google.com>

cpufreq: interactive: allow arbitrary speed / target load mappings

Accept a string of target loads and speeds at which to apply the
target loads, per the documentation update in this patch.  For example,
"85 1000000:90 1700000:99" targets CPU load 85% below speed 1GHz,  90%
at or above 1GHz, until 1.7GHz and above, at which load 99% is targeted.

Attempt to avoid oscillations by evaluating the current speed
weighted by current load against each new choice of speed, choosing a
higher speed if the current load requires a higher speed.

Change-Id: Ie3300206047c84eca5a26b0b63ea512e5207550e
Signed-off-by: Todd Poynor <toddpoynor@google.com>

cpufreq: interactive: remove load since last speed change

The longer-term load since last speed change isn't terribly useful,
may delay recognition of dropping load, and would need forthcoming
changes to adjust load for changing CPU speeds.  Drop it.

Change-Id: Ic3cbb0542cc3484617031787e03ed9bdd632dec1
Signed-off-by: Todd Poynor <toddpoynor@google.com>

Change-Id: Iac93e2540b42408e9c0d49e507635f352846c7ee
msm: rq_stats: Fix lockdep warnings with key's not in .data

Sysfs attributes have lockdep keys and so they should exist in
the data section. Failure to do this results in lockdep turning
itself off and warnings such as:

	BUG: key eeb0883c not in .data!

Fix this problem by statically allocating the attributes.

Change-Id: I30202d8ed561c766ecd2c86657117282e2e25fd1
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>