Resources: Introduce new IpcMemory module

A new IpcMemory module is added to provide address translation
functions operating on the resource table. The IpcMemory module
now inherently includes the resource table as part of the module.
The table is statically created and allocated in the address
specified by IpcMemory.loadAddr. Default address is 0x3000.

Alternatively, the table location could be specified by segment.
If a valid segment is assigned to IpcMemory.loadSegment, the
base address of that segment will be used as the load address
overridng whatever value is assigned to IpcMemory.loadAddr.

The APIs provided by this module for translating virtual to
physical addresses and vice-versa are:
    Int IpcMemory_virtToPhys(UInt32 va, UInt32 *pa)
    Int IpcMemory_physToVirt(UInt32 pa, UInt32 *va)

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Configs: Include the IpcMemory module

Pull in the IpcMemory module that defines the BIOS
Resource Table. The Resource Table is automatically
linked in now by using this module, and is placed at
a common address for the two M3 cores. There is no
need for using a specific linker section mapping in
the base image configuration files.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Samples: Remove resource table trace from Core0 samples

In order to have the linker include the resource table in the
baseimage, the resource variable needs to be used in some form.
Otherwise the optimization in the linker detects that this is a
non-referenced variable and removes it from the baseimage. To
alleviate this, a dummy trace was used to make sure the resource
table section is present in the firmware binary.

The new IpcMemory module inherently adds this trace, and so the
trace in SysM3 samples is no longer required and is removed.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Resources: Add DSP resource table

Add a resource table for DSP with all the memory information and
other required resources. The proper mappings for peripheral and
data areas is specified by the physical address. The ipc, code
and data sections are assigned to fixed physical addresses too
just along-side the carveout memory regions reserved for Ducati
MM use-cases.

Additional macros were also defined to identify sub-1M sizes, and
are used in specifying the sizes for various DSP memory regions.

Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jesse Villarreal <jesse.villarreal@ti.com>
Resources: Rename the library from IpcMemory to ti.resources

The IpcMemory library has been renamed to include the
the usual package name in the library name, rather
than just using a module name.

Other minor cleanup changes are also included.

Signed-off-by: Suman Anna <s-anna@ti.com>
Resources: Rename rsc_table.h as rsc_types.h

The rsc_table.h file has been renamed as rsc_types.h, as this
file only has the definitions defined. The actual resource
table itself is defined as part of the IpcMemory.xdt linker
template file.

Signed-off-by: Suman Anna <s-anna@ti.com>
Resources: Split the resource table into processor-specific files

The resource table definitions for each of the processor subsystems
have been moved into two separate files, each file specific to the
specific processor subsystem. This will provide flexibility and
allow the resource table to vary between different processor
sub-systems.

Signed-off-by: Suman Anna <s-anna@ti.com>
Resources: Adapt to a new TLV-style resource table

The previous resource table is defined as an array of different
resources having the same structure. This approach was very
limiting - all members had to have the same size and members,
and this didn't work quite well since some members are very
small, where others quite big.

The resource table hence is moved to a new type-value based
approach, where each resource entry has its own dedicated
structure. The resource table begins with a simple header
which contains a version field and the number of entries and
their offsets within the table. The version field helps the
host a means to verify the image format they are expecting,
and the offsets help the parsing code to do fast browsing
through the table.

The IpcMemory module has also fixed up to work with the new
resource table format, and continue to provide the memory
translation functions for converting between device/virtual
memory and the actual physical memory.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Juan Gutierrez <jgutierrez@ti.com>
Signed-off-by: Subramaniam Chanderashekarapuram <subramaniam.ca@ti.com>
Resources: Fix insufficient memory allocation for IpcMemory_RscTable

The IpcMemory_RscTable structure definition is using an open-ended
array declaration for the 'offset' element for which the TI linker
has failed to assign any memory. This is causing an erroneous offset
translation in the IpcMemory_getEntry function. The invalid offset
can result in a random value and thereby cause an exception in the
IpcMemory_virtToPhys and IpcMemory_physToVirt API. The 'offset'
variable is now defined as an array with 1 element to make sure the
structure object is allocated enough memory and allow the 'offset'
to be dereferenced correctly.

Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Resources: Fix the resource address in IpcMemory startup trace

The IpcMemory startup function prints a trace about the number of
resources and the address of the resource table to make sure the
correponding symbols are retained in the final baseimage. The
resource table address is incorrectly referenced, and has been
fixed now.

Signed-off-by: Suman Anna <s-anna@ti.com>
Resources: Adjust the physical address of the vrings

The memory allocation on the host-side has switched to use the
Contiguous Memory Allocator (CMA). All the memory regions needing
DDR memory are allocated by the CMA, and the IPC sections are the
first on the per-device CMA region. However, the IPC sections also
needs to be mapped into the MMU, and hence are specified as DEVMEM
entries, and need a physical address matching the start of the CMA
regions. The current alignment requirements for CMA is 8MB, and
this patch corrects the addresses as per the new host-side CMA
reservations.

Signed-off-by: Subramaniam C.A <subramaniam.ca@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
.gitignore:  Ignore new XDC generated IpcMemory.h file.

Signed-off-by: G Anthony <a0783926@ti.com>
Resources:  Make OMAPL138 and OMAP4 work with new IpcMemory.xdt module.

Tweaked OMAP4 IpcMemory.xdt to use the rsc_table which worked for Panda with
upstream-rpmsg kernel v 3.4.

Tweaked OMAPL138 config files to use new IpcMemory.xdt module, and new
hence new resource table.

Signed-off-by: G Anthony <a0783926@ti.com>
tests:  Removed explicit references to resource_table, print __FILE__.

Print test filename on startup, to give indication of what test is actually
running.

Remove references to resource_table, as not the IpcMemory module incorporates
that.

Signed-off-by: G Anthony <a0783926@ti.com>