ReleaseNotes: Add info on PTX back-end

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156745 91177308-0d34-0410-b5e6-96231b3b80d8
Add blurb about Julia.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156754 91177308-0d34-0410-b5e6-96231b3b80d8
Use ArrayRef instead of an explicit vector type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156755 91177308-0d34-0410-b5e6-96231b3b80d8
Formatting changes. Remove the '...' placeholders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156756 91177308-0d34-0410-b5e6-96231b3b80d8
SwitchInst cosmetics: renamed "Hash" method to "hash"



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156757 91177308-0d34-0410-b5e6-96231b3b80d8
Add BitVector::anyCommon().

The existing operation (A & B).any() is very slow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156760 91177308-0d34-0410-b5e6-96231b3b80d8
Compute topological signatures of registers.

TableGen creates new register classes and sub-register indices based on
the sub-register structure present in the register bank. So far, it has
been doing that on a per-register basis, but that is not very efficient.

This patch teaches TableGen to compute topological signatures for
registers, and use that to reduce the amount of redundant computation.
Registers get the same TopoSig if they have identical sub-register
structure.

TopoSigs are not currently exposed outside TableGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156761 91177308-0d34-0410-b5e6-96231b3b80d8
Record the ad hoc aliasing graph in CodeGenRegister.

The ad hoc aliasing specified in the 'Aliases' list in .td files is
currently only used by computeOverlaps(). It will soon be needed to
build accurate register units as well, so build the undirected graph in
CodeGenRegister::buildObjectGraph() instead.

Aliasing is a symmetric relationship with only one direction specified
in the .td files. Make sure both directions are represented in
getExplicitAliases().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156762 91177308-0d34-0410-b5e6-96231b3b80d8
Consider ad hoc aliasing when building RegUnits.

Register units can be used to compute if two registers overlap:

  A overlaps B iff units(A) intersects units(B).

With this change, the above holds true even on targets that use ad hoc
aliasing (currently only ARM). This means that register units can be
used to implement regsOverlap() more efficiently, and the register
allocator can use the concept to model interference.

When there is no ad hoc aliasing, the register units correspond to the
maximal cliques in the register overlap graph. This is optimal, no other
register unit assignment can have fewer units.

With ad hoc aliasing, weird things are possible, and we don't try too
hard to compute the maximal cliques. The current approach is always
correct, and it works very well (probably optimally) as long as the ad
hoc aliasing doesn't have cliques larger than pairs. It seems unlikely
that any target would need more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156763 91177308-0d34-0410-b5e6-96231b3b80d8
Remove BitVector binops.

These operators were crazy slow, calling malloc to return a temporary
result. At the same time, they look very innocent when used in code.

If you need temporary BitVectors to compute your thing, create them
explicitly, and use the inplace logical operators. This makes the high
cost explicit in the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156767 91177308-0d34-0410-b5e6-96231b3b80d8
Remove the expensive BitVector::operator~().

Returning a temporary BitVector is very expensive. If you must, create
the temporary explicitly: Use BitVector(A).flip() instead of ~A.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156768 91177308-0d34-0410-b5e6-96231b3b80d8
Remove a stale forward declaration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156770 91177308-0d34-0410-b5e6-96231b3b80d8
Release notes for MIPS backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156772 91177308-0d34-0410-b5e6-96231b3b80d8
Rename @llvm.debugger to @llvm.debugtrap.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156774 91177308-0d34-0410-b5e6-96231b3b80d8
Revert 156634 upon request until code improvement changes are made.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156775 91177308-0d34-0410-b5e6-96231b3b80d8
Move the capture analysis from MemoryDependencyAnalysis to a more general place
so that it can be reused in MemCpyOptimizer.  This analysis is needed to remove
an unnecessary memcpy when returning a struct into a local variable.
rdar://11341081
PR12686


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156776 91177308-0d34-0410-b5e6-96231b3b80d8
Fix PR12821.

RAFast must add an <imp-def> operand when it is rewriting a sub-register
def that isn't a read-modify-write.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156777 91177308-0d34-0410-b5e6-96231b3b80d8
Don't access MO reference after invalidating operand list.

This should unbreak llvm-x86_64-linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156778 91177308-0d34-0410-b5e6-96231b3b80d8
Fix use of uninitialized variable.

Found by GCC's maybe-uninitialized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156780 91177308-0d34-0410-b5e6-96231b3b80d8
[Support/COFF] Make the order of members in symbol match the standard.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156785 91177308-0d34-0410-b5e6-96231b3b80d8