[ARM] For arm32ve physical_addr_t and physical_size_t types are 64-bit due to use of LPAE.

This patch changes physica_addr_t and physical_size_t for cortex-a15-ve support.
It also fixed related compiler warnings.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] Splitted reserved space expected by host aspace from arch code into core reserved space and arch reserved space.

This patch splits reserved space into core reserved space (for VAPOOL bitmap and RAM bitmap in core code) and arch reserved space (optional space for keeping architecture specific reserved memory e.g. pool of page tables).

This patch adds to the meaning of reserved space in vmm_host_aspace_init() and make it more flexible. Previously it was mandatory to keep architecture specific reserved memory appended to reserved space expected by vmm_host_aspace_init(). With this patch in-place we dont have this restriction any more. The architecture specific code can keep its reseved memory any where provided it does not overlap code space and core reserved space.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Removed unwanted code from arm32ve.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Add ARM V5 (ARM9) support to xvisor.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] separate ARMV5 and ARMV7 atomic operations.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] separate ARMV5 and ARMV7 IRQ managment operations

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] implement wait_for_interrupt for ARM V5

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Added defines for new registers in virtualization extensions.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Added inline asm macros to read/write virtualization extension registers.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Initial mmu setup for arm32ve completed.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Cleanup in initial MMU setup of arm32ve.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Added separate DTS for cortex-a15-ve in vexpres-a15 board.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Added #define for number of initial translation table.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: First-cut working implementation LPAE mmu.

This patch adds the new MMU introduced with virtualization extensions. The new MMU code works but there few small things remaining. This a big step for arm32ve port.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] net: removal of netswitch as sperate module.

Now netdev and netswitch are both intialized from netdev.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: fixed cpu_mmu_get_page() in the LPAE mmu.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: completing arch_irq_* functions required by core.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32: reorganised init section to reduce binary size.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] arm32ve: removed unwanted sections and re-organised linker script.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] Fixed vmm_devdrv_ioremap() in vmm_devdrv.

Signed-off-by: Anup Patel <anup@brainfault.org>