radeon/llvm: Handle selectcc DAG node

R600 can now select instructions from the selectcc DAG node, which is
typically lowered to one of the SET* instructions.
Filter out -Wcovered-switch-default from LLVM_CFLAGS

Signed-off-by: José Fonseca <jfonseca@vmware.com>
docs: fix a typo

Signed-off-by: Brian Paul <brianp@vmware.com>
glu: fix two Clang warnings

This patch removes two Clang warnings in GLU:

The first one seems to be an actual bug in mapdesc.cc: Clang complains
that sizeof(dest) will return the size of REAL*[MAXCOORDS], instead of
the intended REAL[MAXCOORDS][MAXCOORDS]. The second one is just
cosmetic because Clang doesn't like extra parentheses.

NOTE: This is a candidate for the 8.0 branch

Reviewed-by: Brian Paul <brianp@vmware.com>
tests: include mesa headers

else they will fail for fresh installs

Signed-off-by: Brian Paul <brianp@vmware.com>
docs: add link to 8.0.3 release notes
gallivm: Fixed overflow in lp_build_clamped_float_to_unsigned_norm.

Tested with lp_test_conv and lp_test_format, reduced errors.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
gallivm: Compensate for lp_const_offset in lp_build_conv.

Fixing a /*FIXME*/ to remove errors in integer conversion in lp_build_conv.
Tested using lp_test_conv and lp_test_format, reduced errors.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
gallivm: Fixed erroneous optimisation in lp_build_min/max.

Previously assumed normalised was 0 to 1, but it can be -1 to 1
if type is signed.
Tested with lp_test_conv and lp_test_format, reduced errors.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
llvmpipe: Added fixed point types tests to lp_test_conv.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
llvmpipe: Changed known failures in lp_test_conv.

To comply with the recent fixes to lp_bld_conv.

Signed-off-by: José Fonseca <jfonseca@vmware.com>
llvmpipe: Added a error counter to lp_test_conv.

Useful for keeping track of progress when fixing errors!

Signed-off-by: José Fonseca <jfonseca@vmware.com>
nvc0: don't set NEW_IDXBUF in nvc0_switch_pipe_context if none is bound
nv50: make unaligned index buffer offsets work again

Messed up in ef7bb281292c17b762b57779306e874704c87328.
nv30: check for NULL vertex buffers in prevalidate_vbufs
scons: Do not build glx and egl on Cygwin.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
llvmpipe: Fix alpha testing precision on rgba8 formats.

This is a long standing problem, that recently surfaced with the change
to enable perspective correct color interpolation.

A fix for all possible formats is left to the future.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
intel: When AUB dumping, flush before emitting final bitmap command.

When we are generating an AUB dump, we make a final call to
aub_dump_bmp() as the context is being destroyed, to ensure that any
rendering performed before the application exits can be seen during a
simulation run.  However, we were doing this before flushing the batch
buffer; as a result simulation runs would not always see the effect of
all rendering commands.

This patch flushes the batch buffer just before making the final call
to aub_dump_bmp(), to ensure that all rendering is properly captured
in the final bitmap.
i965: Completely annotate the batch bo when aub dumping.

Previously, when the environment variable INTEL_DEBUG=aub was set,
mesa would simply instruct DRM to start dumping data to an .aub file,
but we would not provide DRM with any information about the format of
the data in various buffers.  As a result, a lot of the data in the
generate .aub file would be unannotated, making further data analysis
difficult.

This patch causes the entire contents of each batch buffer to be
annotated using the data in brw->state_batch_list (which was
previously used only to annotate the output of INTEL_DEBUG=bat).  This
includes data that was allocated by brw_state_batch, such as binding
tables, surface and sampler states, depth/stencil state, and so on.

The new annotation mechanism requires DRM version 2.4.34.

Reviewed-by: Eric Anholt <eric@anholt.net>
i965/msaa: Expand odd-sized MSAA surfaces to account for interleaving pattern.

Gen6 MSAA buffers (and Gen7 MSAA depth/stencil buffers) interleave
MSAA samples in a complex pattern that repeats every 2x2 pixel block.
Therefore, when allocating an MSAA buffer, we need to make sure to
allocate an integer number of 2x2 blocks; if we don't, then some of
the samples in the last row and column will be cut off.

Fixes piglit tests "EXT_framebuffer_multisample/unaligned-blit {2,4}
color msaa" on i965/Gen6.