MFD: TWL 6030: clear IRQ status register only once

TWL6030 family of PMIC use a shadow interrupt status register
while kernel processes the current interrupt event.
However, any write(0 or 1) to register INT_STS_A, INT_STS_B or
INT_STS_C clears all 3 interrupt status registers.

Since clear of the interrupt is done on 32k clk, depending on I2C
bus speed, we could in-adverently clear the status of a interrupt
status pending on shadow register in the current implementation.
This is due to the fact that multi-byte i2c write operation into
three seperate status register could result in multiple load
and clear of status and result in lost interrupts.

Instead, doing a single byte write to INT_STS_A register with 0x0
will clear all three interrupt status registers without the related
risk.

Change-Id: Iba62dd1caeabf8c2db21d1b6c9fd62455f73205e
Signed-off-by: Nishanth Menon <nm@ti.com>
checkt: display trim value
Identify silicon type
omap4_trim_quirks: in case i ever need to look this up
defconfig: turned off delayed SR recalibration.

Reboot or update voltage manually if you want to trigger recalib.
my busybox moved to another dir to avoid any potential conflict
omap4: opp: Correct hwmod name for dsp in the opp_def_list

patch by Juan Gutierrez.
OMAP4: HSI: changed Fclk to 192Mhz for OPP100

HSI RX and TX bit rates depend on HSI Functional clock and cannot be higher
than Fclk.
Allowed higher HSI throughputs by enabling 192MHz@OPP100.

Change-Id: I274f0860d48ec79a1331366b8866f883ae372d2f
Signed-off-by: Djamil Elaidi <d-elaidi@ti.com>
OMAP4460: OPP: add recommended conservative s/w margins
OMAP4460: OPP: SR1.5: update margin to spec rev 0.4

combined two commits from Nishanth Menon and modified for my opp table
ARM: OMAP4: cpuidle: Configure MPU C4 state to OSWR

I'm merging commit by Madhusudan Chittim despite Colin's warning
....for now.
Revert "OMAP4: HSI: changed Fclk to 192Mhz for OPP100"

This reverts commit 48bcc7f325d9abf0b771d7c7ea17a59ffd713d37.
OMAP4: HSI: fix wrong debugfs counters setting

When user enters a FB/TB/FT counter value bigger than maximum allowed, the
value used was not the max allowed but input value modulo maximum allowed.

This has been fixed to use max allowed value.

Change-Id: I893827fb362e33ca42142c916ec952ff1b4fd56b
Signed-off-by: Djamil Elaidi <d-elaidi@ti.com>
OMAP3+: xSI: fix warnings

Fixed warning in debugfs for SSI
Fixed unused variable

Change-Id: I609e4abb547cf92156e6d9ab9ab8944c39c4ea57
Signed-off-by: Djamil Elaidi <d-elaidi@ti.com>

Conflicts:

	drivers/omap_hsi/hsi_driver.c
OMAP4: PM: Handle LPDDR CLK IO errata during suspend/idle

There is a HW bug in CMD PHY which gives ISO signals as same for
both PADn and PADp on differential IO pad, because of which IO
leaks higher as pull controls are differential internally and
pull value does not match A value.
Though there is no functionality impact due to this bug, it is
seen that by disabling the pulls there is a savings ~500uA in
OSWR, but draws ~300uA more during OFF mode.

To save power during both idle/suspend following approach taken:
 1) Enable WA during boot-up.
 2) Disable WA while attempting suspend and enable during resume.

CDDS no: OMAP4460-1.0BUG00291
(OMAP official errata ID yet to be available).

Change-Id: Ic39f17be50ff602c71e714b05af3811b35c1a67f
Reported-by: Logan Lee <hklee@ti.com>
Signed-off-by: Shashi Shekar B.S. <shashi.shekar@ti.com>
Signed-off-by: Ambresh K <ambresh@ti.com>
OMAP4:PM: Remove redundant SR disable call

SR disable is getting called twice in a row. This
patch removes the redundant call.

Change-Id: I7010347a24186d6abc693270d610482a36b6c7b8
Signed-off-by: Girish S G <girishsg@ti.com>
Reported-by: Bour Vincent <v-bour@ti.com>
defconfig: tweak SGX power latency for potential power savings

I'm not sure if this value is being used in any meaningful way.
Revert "omap4_trim_quirks: in case i ever need to look this up"

This reverts commit 9309272c1d1966bd1ec66713c79abcff7896ef4b.
Merge branch 'lk-dev' into lk-exp180
checkt: display # of awake clocks
Revert SLUB v3.1 backport