MIPS: board.c: fix init of flash data in bd_info

Boards with CONFIG_SYS_NO_FLASH should not forced to define
CONFIG_SYS_FLASH_BASE. In this case the flash data in bd_info
should be initialized with 0 like the other archs do.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: fix inconsistency in config option for cache operation mode

Commit ab2a98b11716364bc5a8c43cdfa7fee176cda1d8 missed to
use the new config option in dcache_enable().

Fix this to avoid inconsistencies if someone wants to disable
and enable D-caches.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: fix endianess handling

Make endianess of target CPU configurable. Use the new config
option for dbau1550_el and pb1000 boards.

Adapt linking of standalone applications to pass through
endianess options to LD.

Build tested with:
 - ELDK 4 mips_4KC- and mips4KCle
 - Sourcery CodeBench Lite 2011.03-93

With this patch all 26 MIPS boards can be compiled now in one step by
running "MAKEALL -a mips".

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: add register definition for EBase register

The CPUNum field in the Ebase register contains an unique identifier
for each CPU. This helps to distinguish between CPU cores in
multi-processor systems.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: extend cache initialization for recent MIPS CPU cores

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: start.S: refactor reset and exception vector setup

Use assembler macros for vector and handler setup.
Only implement the specific vectors offsets and let the
assembler fill the gap with zeroes.

Add missing exception vectors and handlers for Interrupt, CauseIV and
EJTAG debug.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: add header file for generic GPIO API

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: add init hook for CPU specific initialization

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: board.c: factor out extern declarations

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: board.c: optimize error message string

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: simulate -ffunction-sections for assembler functions

Move all functions declared with LEAF or NESTED into an own
text section to allow garbage collecting of unused sections
for those functions.

This saves additional text space if functions like those in
cache.S are not used.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: start.S: add option for disabling cache on startup

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
cfi_flash: add optional and board-specific address swapping for CFI commands

This patch adds the possibility to (optionally) swap the address
in the flash_map function.

This is needed for the upcoming support of Lantiq SoCs which access
NOR flash over a little-endian AMBA bus whereas the MIPS CPU itself
operates in big-endian mode. To allow CFI probing and booting from
NOR flash, manual address swapping in software is needed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Stefan Roese <sr@denx.de>
net: switchlib: add generic library for ethernet switch chips

Add a generic framework similar to phylib for ethernet switch
drivers and devices. This is useful to share the init and
setup code for switch devices across different boards.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Andy Fleming <afleming@freescale.com>
net: switchlib: add driver for Lantiq PSB697X switch family

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
net: switchlib: add driver for Lantiq ADM6996I switch family

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: lantiq: add initial support for Lantiq SoCs

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: lantiq: add support for Lantiq XWAY Danube family

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: serial: lantiq: add driver for UART found on Lantiq SoCs

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
MIPS: dma: lantiq: add driver for DMA engine found on Lantiq SoCs

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>