Revert "Reduce voltage by 100 mV for all frequencies."

This reverts commit cc21adfc536e37b2309fa3bb1809ab4a10c1c156.
msm: acpuclock: Support tracing of CPU frequency changes

Utilize the cpu_frequency traces to profile CPU frequency switching.

Change-Id: I5f7b5ea9ab0bd70deb3d64c9361c4b56ab63466d
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock-krait: NULL terminate L2 table for find_cur_l2_level()

find_cur_l2_level() assumes that the L2 table is NULL terminated
when it has never been terminated. Therefore, if the rate that is
read from the hardware during boot is not found in the table we
will run off the end of the table and read potential junk values.
NULL terminate all the L2 tables so that the loop in
find_cur_l2_level() is guaranteed to terminate.

Change-Id: Ia5d0213000b44def35e388fd3cadf0293344257b
Reported-by: Laura Abbot <lauraa@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: acpuclock-8960ab: Set power collapse rate

This line was somehow left out when initially copying the
acpuclock-8960 file over to the acpuclock-8960ab file.

Without this line, power collapse leaves the Krait PLL enabled,
causing failures upon resume.

Change-Id: I1339192d59d8b7f4135b32dcb5807bfc4dababfc
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-8960ab: Add frequencies up to 1.7 GHz.

The 8960ab application processors are able to run up to 1.7 GHz.
Update the frequency table to enable this.

Change-Id: I99f9250748f15eea2897f9d0e83c88d79d3b2ad9
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-krait: Fix PTE efuse address for acpuclock-8974

Correct the efuse address base and offset for 8974. Since the offset
is now different on 8974 than on other Krait-based targets, it's no
longer possible to hard-code it in acpuclock-krait.c. Instead, move
it into the QFPROM address passed from SoC specific files.

Since the PTE EFUSE is not yet used on 8974 to select different
frequency/voltage tables, this change should have no current
functional effect.

Change-Id: I26de7c9ce84e2873b883123f9fe420b3cb14e364
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock-8960: Port AVS hooks to acpuclock-8960

When AVS support is available, it must be disabled during any
CPU frequency or CPU voltage changes. Add the hooks to do this.
Since AVS isn't supported on all variants of Krait that
acpuclock-krait supports, have a flag indicating if AVS is
enabled and only configure AVS if the tables support an AVS
setting.

Change-Id: Ide542596b51af18dece4c062b38173ce6e1bc2a0
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
msm: acpuclock-krait: Disable secondary clock source gating during switches

To workaround a Krait errata on 8064, disable secondary clock source
gating during the MUX switch. This errata was already worked around
in msm-krait-l2-accessors.c in a different way, but that will soon
be removed in favor of this and some power-collapse changes.

Change-Id: I2a732e020a045384c3a4a2401ce7c819cd8de26b
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock-8930: Support PMIC 8917

If the PMIC 8917 device is detected, then enable s8 regulator
before turning on the l23 hfpll regulator.

Use platform_data to indicate presence of pm8917.

Change-Id: Ic39b460d6de14d37b9ca477494c35d90c9468780
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-8974: Increase max CPU and L2 frequencies to 1.5GHz

Devices appear stable at these increased rates, even on early
hardware. Raise the frequency limit from 1.0GHz to 1.5GHz.

Change-Id: Ic0b5e8193a94d39c53721350b966656d5f734e33
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock-8974: Populate missing user_vco_mask in hfpll_data

This mask is needed in order to switch VCO modes when running the
PLL at frequencies above 1700MHz. Specify the missing data. Because
rates about 1.7GHz are not used yet, the missing mask should not
have been the source of any real problems.

Also remove the TODO line that was inserted as a reminder to
double-check the 'magic' PLL configuration register values after
hardware characterization. That has since been done and the
original values were determined to be fine.

Change-Id: I548c02e44cc5fded740e513252110e7318fec6e8
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock-krait: Keep the secondary MUX input fixed

With use of the QSB clock source recently eliminated, only one
input of the secondary clock MUX is used on any target. Since
there is overhead involved reprogramming this MUX when changing
the CPU and L2 frequencies, change the code to just program the
MUX at boot.  Most noticeably, this removes a 1us delay from
every CPU and L2 frequency switch.

Change-Id: I5cd8c981f1be49be7dbba1310d84df439e8be83b
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
msm: acpuclock-8064: Add support for multiple speed and PVS bins.

Add support for 1.7 GHz and 2.0 GHz parts and their corresponding
L2 and memory bandwidth votes.

Support selecting different PVS tables based upon EFUSE speed bin
across all krait targets.

Change-Id: Ibbf6b5182fce0a9e92014883d07a35dee5f0d2a1
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-8064: Lower VDD_DIG voltage vote for L2 at 384MHz

New characterization data shows that vdd_dig voltage for L2@384MHz
can be lowered to 0.95v. Update the data in this patch.

Change-Id: Ibdb8568eca4d4ed602c5a5fee2f433a098dfbdcd
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
msm-3.4: acpuclock: Add 8064v2 PVS voltage table data

Add PVS tables for 8064v2 speed bin 2 (2GHz).

Change-Id: Iceffba9d0718f263de6e0fb32a89ca7878ad8310
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-8064: Final PVS Table Data for 8064v2

Update data from preliminary values to final data.

Change-Id: I69f32ef1bc1a82f8a93c1d465e55116e2a718013
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-8064: Add support for 8064v1.1 FASTER PVS bin

Add updated PVS data.

Change-Id: I011241d3ea3943673a888cd0aeca925440500ff2
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: acpuclock-8064: Add PVS tables for 1.7 GHz parts

Add all seven PVS bins.

Change-Id: I6408e4f94b92ca70547817ba7a3c390b9f980ca7
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Makefile: set cross compiler and architecture