msm_fb: display: add mdp version info for later mdp h/w

fbtest needs to get the correct mdp version number, but now only the
version up to mdp4.0 is returned. Add the latest mdp version up to
4.4.

Change-Id: If1ff302bb4a02ed13bb4dcabcb933fd5adfbec6d
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
msm_fb: display: Attach and detach MDP IOMMU on suspend/resume

MDP IOMMU is not in a clean state on suspend/resume with page faults
seen with video playback after resume. Hence, IOMMU is detached
during suspend and attached on every resume call.

Change-Id: I906cd7fa79ab67fd69eb1974d06d3521d42bf55b
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: display: Fix invalid x offset programming for YUV444 fmt

Source x offset adjustment is not properly programmed for YUV444 format,
it is always programmed as 0. Add support for correct x offset
adjustment.

Change-Id: I73e87f961bda60670cc764c66be955e48ccf2734
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: display: Flush background pipe after solid fill configuration

For is_fg support on a foreground pipe, the  background pipe is
currently set to Solid Fill mode without being flushed. Add flush
after enabling Solid Fill on background pipe.

CRs-fixed: 352855
Change-Id: I91c4e391c9577a9198d048d2b369369d348efeab
Signed-off-by: Amara Venkata Mastan Manoj Kumar <manojavm@codeaurora.org>
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: display: Add MDP IOMMU detach support for DTV

IOMMU detach support on suspend is currently meant for DSI Video
and LCDC modes. The detach call is moved to early suspend for primary
display and external DTV to avoid page faults related to
suspend/resume cases.

Change-Id: Ia45071c44c20b951a328f39a033bdd83ff77d8f8
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: display: Free staged foreground pipes during suspend

During suspend, some foreground pipes might still be staged and
have to be removed before disabling timing generator.
So, these pipes are staged down and freed before timing generator
is switched off.

Change-Id: I3f2376cac43464c64cd1c9e2f16f3d801298c25d
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay.c
msm_fb: Display: Add additional settings to improve DSI signal strength.

Modify/add new Physical layer settings for Lane,
BIST and PHY strength to improve the rise/fall time of
the DSI clock waveform.

CRs-Fixed: 364037
Change-Id: Ie2503100eebdf9d4c82d457c187ab8fa903778c6
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
msm-fb: display: lm2 writeback support on mpq platfroms

lm2 writeback has broken on mpq platfroms as lm1 and lm2 are
selecting the same axi writeback path. It adds the support
to select the right axi writeback path based the availability
of the write master

Change-Id: Ia6b868ff13de5edc641e4795794286893c063e66
Signed-off-by: Nagamalleswararao Ganji <nganji@codeaurora.org>
msm_fb: display: Wait for external vsync before DTV IOMMU unmap

In play wait call for DTV, software waits for overlay1 done before
unmapping IOMMU buffers. This is replaced by external vsync wait
to avoid page faults.

Change-Id: I67d3615121e9eda3a4378553049a41e32860a520
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: display: Set the minimal sleep time for DSI PHY Initialisation

On 7x27A/8x25, set the minimal sleep time required for DSI PHY
hardware to get initialized and for the display to come up.

CRs-fixed: 367652
Change-Id: If040a5ac37f694e83b819ecf08fc80f2afb7afaa
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm_fb: display: Clear background solid fill on closing video pipe

Clear background pipe's solid fill setting on closing Video pipe
to avoid blink issues in display

Change-Id: Iac3c884334f38580fb5c9dbfb260dd6940ef5019
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
msm_fb: display: switch mdp mode without turning off timing generator

MDP need to be in idle state before switching to different mode.
Dmap_done interrupt is delivered when the last line of frame is
clocked out. Therefore mdp is in idle state during dmap_done ISR.
This patch execute mdp mode switching inside dmap_done ISR.
Therefore timing generator is not necessary to be turned off
since mdp is in idle state already.

CRs-fixed: 350154
Change-Id: Ib10557bde90856ffd5284a0a76dddbe92f2abc0e
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay_dsi_video.c
msm_fb: display: Add support for 4 layer MDP composition

Add 4 layers composition support to MDP by allowing borderfill
pipe to be used as base layer of mdp blending. This releases
RGB1 base pipe which can be used as a general purpose pipe.

Change-Id:I517485d738e8bb555a263b3ea885d78d5e4f4396
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>

Conflicts:

	drivers/video/msm/mdp4_overlay.c
msm_fb: display: change ion memory map for mdp mixer2 writeback

One way that mdp mixer2 gets writeback address is to get ion memory fd
from userspace, then mdp driver maps this fd in kernel. When mdp iommu
domain was not enabled, this maps to a physical address. Now after mdp
iommu domain is enabled, the map is changed to an iommu virtual addr.

Change-Id: I461a00cc93169de586565834af4fb9a43949cf95
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
msm_fb: display: Flush pipe registers before staging for Mixer 0 or 1

For Mixer 2, register flush need not be called. Flushing is done
only for pipes on mixer 0 and 1.

Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Change-Id: I54758f79552790de2ad936703ba6140ac57b76c4
msm_fb: display: Fix Toshiba WSVGA panel porch and timing settings

Fix the porch and timing settings for DSI Toshiba WSVGA panel
to enable writeback mode switch efficiently.

Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Change-Id: Ib768d13617470f75ae027970c6ca4779d6b5a367
msm_fb: display: Attach IOMMU for DSI cmd mode in kickoff call

Attach IOMMU call is currently done from DSI cmd mode DMA
update method. Move the attach call to kickoff which enables
it from restore and video paths

Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Change-Id: I06d39e31b3ab1cf797fb655e7e558c1cabd98ebf

Conflicts:

	drivers/video/msm/mdp4_overlay_dsi_cmd.c
msm_fb: display: Enable MDP clock's overlay block during panel on

MDP clock's overlay block is enabled during first update after panel
on currently. This is now moved to panel on to keep clock enabled
right from display on time.

Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Change-Id: Ie201186c1471201874f2eff246486bc4a73b5872
msm_fb: display: Wait for overlay done after DSI Video writeback switch

After writeback mode is switched for DSI Video interface, wait for
overlay done for prefill frame to avoid unnecessary fetches from previous
buffers resulting in page faults.

CRs-Fixed: 372389
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
Change-Id: Iacd3775a718fe8e08404b4d119d447a88b628617
msm: clock-8960: Change source of DSI escape clock to byte clock

Changing DSI escape clock source from PXO to byte clock to add
flexibilty for customers. They can modify the escape clock by
changing the pinfo divider.

Change-Id: I3ad072fc524fe5fae9695a55bba24ce23b97efc7
CRs-Fixed: 361022
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>