CMake toolchain file for Android NDK.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163612 91177308-0d34-0410-b5e6-96231b3b80d8
Stack Coloring: Dont crash on dbg values which use stack frames.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163616 91177308-0d34-0410-b5e6-96231b3b80d8
Enable stack coloring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163617 91177308-0d34-0410-b5e6-96231b3b80d8
Dragonegg selfhost exposed additional cases where alloca usage moved outside of lifetime markers. Disabling the pass for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163623 91177308-0d34-0410-b5e6-96231b3b80d8
Formatting. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163627 91177308-0d34-0410-b5e6-96231b3b80d8
Add MCRI::getNumSubRegIndices() and start checking SubRegIndex ranges.

Apparently, NumSubRegIndices was completely unused before. Adjust it by
one to include the null subreg index, just like getNumRegs() includes
the null register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163628 91177308-0d34-0410-b5e6-96231b3b80d8
Clean the sub-reg index composition maps at emission.

Preserve the Composites map in the CodeGenSubRegIndex class so it can be
used to determine which sub-register indices can actually be composed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163629 91177308-0d34-0410-b5e6-96231b3b80d8
Add TRI::getSubRegIndexLaneMask().

Sub-register lane masks are bitmasks that can be used to determine if
two sub-registers of a virtual register will overlap. For example, ARM's
ssub0 and ssub1 sub-register indices don't overlap each other, but both
overlap dsub0 and qsub0.

The lane masks will be accurate on most targets, but on targets that use
sub-register indexes in an irregular way, the masks may conservatively
report that two sub-register indices overlap when the eventually
allocated physregs don't.

Irregular register banks also mean that the bits in a lane mask can't be
mapped onto register units, but the concept is similar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163630 91177308-0d34-0410-b5e6-96231b3b80d8
SimplifyCFG: preserve branch-weight metadata when creating a new switch from
a pair of switch/branch where both depend on the value of the same variable and
the default case of the first switch/branch goes to the second switch/branch.

Code clean up and fixed a few issues:
1> handling the case where some cases of the 2nd switch are invalidated
2> correctly calculate the weight for the 2nd switch when it is a conditional eq

Testing case is modified from Alastair's original patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163635 91177308-0d34-0410-b5e6-96231b3b80d8
[ms-inline asm] Split the parsing of IR asm strings into GCC and MS variants.
Add support in the EmitMSInlineAsmStr() function for handling integer consts.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163645 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify logic. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163648 91177308-0d34-0410-b5e6-96231b3b80d8
StringSwitchify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163649 91177308-0d34-0410-b5e6-96231b3b80d8
Release build: guard dump functions with
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"

No functional change. Update r163339.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163653 91177308-0d34-0410-b5e6-96231b3b80d8
Rename the isMemory() function to isMem().  No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163654 91177308-0d34-0410-b5e6-96231b3b80d8
Add a few virtual functions to the abstract MCParsedAsmOperand class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163655 91177308-0d34-0410-b5e6-96231b3b80d8
Add documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163658 91177308-0d34-0410-b5e6-96231b3b80d8
Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163659 91177308-0d34-0410-b5e6-96231b3b80d8
Improve tblgen code cleanliness: create an unknown_class, from which the unknown def inherits.  Make tblgen check for that class, rather than checking for the def itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163664 91177308-0d34-0410-b5e6-96231b3b80d8
Add some support for dealing with an object pointer on arguments.

Part of rdar://9797999

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163667 91177308-0d34-0410-b5e6-96231b3b80d8
Stack coloring: remove lifetime intervals which contain escaped allocas.

The input program may contain intructions which are not inside lifetime
markers. This can happen due to a bug in the compiler or due to a bug in
user code (for example, returning a reference to a local variable).
This commit adds checks that all of the instructions in the function and
invalidates lifetime ranges which do not contain all of the instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163678 91177308-0d34-0410-b5e6-96231b3b80d8