video: msm: Dynamically toggle histogram interrupt

Make histogram enable/disable functions also enable/disable the histogram
"interrupt enabled" bit on the MDP enabled interrupts register.

CRs-Fixed: 398556
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
Change-Id: I56f811e88cf3fd44ae0a2df8a6e5de32ba9a0c1c
(cherry picked from commit 1026832c51cbadeea9a717fa20fb42b6a7c5661f)

Conflicts:
	drivers/video/msm/mdp4.h
video: msm: Defer histogram reset to workqueue

Currently, when an underrun occurs, a reset request is sent to the
histogram hardware. This has been observed to cause a hang in the histogram
collection cycle. The fix for this hang is to instead rely on the existing
checks for histogram validity in the histgram read worker. When the
underrun occurs, the histogram is invalidated, which in turn causes the
histogram read worker to reset the histogram collection when it attempts to
read its contents.

Change-Id: I66d33ddedef76fdcb6c4a3d8095c0e8ca695e33d
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
(cherry picked from commit 2dd5234c094157bf77781b8646ac9ad114f819b0)

Conflicts:
	drivers/video/msm/mdp.c
video: msm: Ensure idle state before enabling histogram

Disable interrupt, set state flags to false, cancel histogram collection,
and clear the workqueue before attempting to enable the histogram. This
guarantees that this is the only configuration of the histogram running.

Change-Id: I222932db40494724b3efdb2e5bea08a849095c1e
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
(cherry picked from commit 5e5f3b4ff8a4a0d980e02fa38c2b70fec7095e79)
msm:vidc: Fix buffer pool index

While searching for the available buffer entry
in the buffer pool the search should begin from
index 1 as zeroth entry is reserved.

CRs-fixed: 366361
Change-Id: I051b0232bb782f073ba9ad0b757a799703814df3
Signed-off-by: Mohan Kumar Gubbihalli Lachma Naik <mgubbi@codeaurora.org>
msm: kgsl: Check for valid address on indirect buffer submission

When an indirect buffer is submitted to the kernel, check if the
indirect buffer address is in a valid address range.
This helps avoid GPU page faults when GPU executes
these indirect buffers.

Change-Id: I6e668ecbcc0d27a7bf872c73faa3fea7b60b1f95
Acked-by: Sunil Kumar <sdevalok@quicinc.com>
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
msm: kgsl: set userspace memory type on each memdesc

Userspace passes a set of values indicating how it
uses each buffer it allocates, which were previously
ignored. These are useful hints for debugging and
profiling applications. These flags will be exposed
through ftrace and debugfs in later patches.

Change-Id: Ie26c26e413c074dcd5dfa24d355443ee47c3cd6a
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
msm: kgsl: Verify the user doesn't accidentally submit a zero length IB

Indirect buffers to be executed will not be (and cannot be) zero length.
Check and reject.

Change-Id: Ic0dedbadea429c4f7bd386c5e64603b51ea8af61
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Add the thread group leader ID to memory traces

Because we store process memory indexed by the thread group leader and
report pagefaults accordingly it helps reduce confusion to record the
TGID for the allocation in the memory trace messages.

Change-Id: Ic0dedbad79c7112c4a6746cea0941104519e495c
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
video: msm: Remove an ifndef from mdp_isr

Remove ifndef so later patch does not require adding more ifndefs.

Change-Id: Ia06e844f42086ad76019f66b575ed78a40ebafc4
Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp.c
msm_fb: Make Vsync IOCTL during disable sequence as NO WAIT

Change to make the vsync IOCTL no wait during the disable sequence.
This is to increase the performance. Handle the synchronization of
vsync interrupt using state variables in drivers from now.

Change-Id: Ia5ec14493f233a95f21d01ea627200a6c278239f
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp.c
	drivers/video/msm/mdp.h
	drivers/video/msm/mdp_dma.c
	drivers/video/msm/mdp_dma_dsi_video.c
	drivers/video/msm/mdp_dma_lcdc.c
msm_fb: Return pan_display call on Vsync interrupt

Till now, the pan_display call returns on DMA_P_DONE interrupt.
For command mode panels, the DMA transfer starts only after the
DMA engine receives a TE signal from the panel. Hence, return
pan_display ioctl on vsync interrupt to improve performance.
We still wait if the previous DMA transfer is not finished at
the beginning of next pan_display.

(cherry picked from commit 61832135cad75ef082a905fedb30d835c85611b5)

Change-Id: I2eb250c0ba87098424c03fb6ecfffcd1e62ec2c9
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Jessica Goznalez <jgaona@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp.c
	drivers/video/msm/mdp_dma.c
Add spin_lock_irqsave(&mdp_spin_lock, flag);
msm_fb: display: Send vsync events using sysfs for MDP3 targets

Replace sending of vsync timestamp using uevents with sysfs entry
as uevent result in increase in power numbers due to broadcast in
nature.

(cherry picked from commit 4ae2fcc7a3e2f1e68efe57ea0a42e7a4b83e87da)

Change-Id: I89bebef35e04c1b5e1e5a56d26482c95f1928b68
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Jessica Gonzalez <jgaona@codeaurora.org>

Conflicts:
	drivers/video/msm/mdp.c