d2: remerge d2 changes to main jb branch

Change-Id: I2749b9bff07dbec4f354df54a7e857a82ce499f0
msm: rotator: Add secure session flag to rotator start data

Add flag for handling secure session to rotator data passed during
start ioctl call.

Change-Id: I58e2107dfc5c9956691a3defa7364fc220cfe079
Signed-off-by: Ravishangar Kalyanam <rkalya@codeaurora.org>
sched/nohz: Correctly initialize 'next_balance' in 'nohz'
 idle balancer

The 'next_balance' field of 'nohz' idle balancer must be initialized
to jiffies. Since jiffies is initialized to negative 300 seconds the
'nohz' idle balancer does not run for the first 300s (5mins) after
bootup. If no new processes are spawed or no idle cycles happen, the
load on the cpus will remain unbalanced for that duration.

Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1DD7BFEDD3147247B1355BEFEFE4665237994F30EF@HQMAIL04.nvidia.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>

[xqi@codeaurora.org merge into different file location in 3.0]
Change-Id: I42c41210babb0881150d28d11c2d3fce24fe3a9f
Signed-off-by: Xin Qi <xqi@codeaurora.org>
sched/nohz: Fix logic in nohz_kick_needed

Update the logic so that as long as rq->nr_running is greater than 1,
nohz_kick will be needed, regardless of whether the current CPU has
successfully competed for the first or second cpu spot

Previous logic has the corner case that if current CPU has r_running more than
1, and two other CPUs alreay hold first and econd cpu spot, but they don't
meeting kicking criterial (first cpu has nr_running 1, and second cpu doesn't
have any load), then nohz_kick will not be set correctly.

Change-Id: I30790f22df0a2e90899daa44c67757284dcca25d
Signed-off-by: Xin Qi <xqi@codeaurora.org>
sched/nohz: Fix logic in run_rebalance_domains

If triggered by nohz_balancer_kick, idle_at_tick is not updated
accordingly.  Update myself at this moment right before it is used

Change-Id: I20dd4314159e70f955ffe482160c8867c65c261e
Signed-off-by: Xin Qi <xqi@codeaurora.org>
sched/nohz: Fix logic in trigger_load_balance

Whether we need to kick nohz doesn't depend on current rq->next_balance,
meaning it doesn't depend on the check of previous if condition.

Change-Id: I566011d6341fa7a9a700c834f77e129043eaba11
Signed-off-by: Xin Qi <xqi@codeaurora.org>
ram_console: set CON_ANYTIME console flag

We want to ensure that we get all the console messages, even ones
that occur while the printing CPU is not yet online.

Change-Id: I1d2694d05ac9415669a92f38efdd8e71c927705b
Signed-off-by: Dima Zavin <dima@android.com>
d2: Disable the verbose ramconsole printks

 * Although this is really nice, it's introducing some nasty latency
   into the kernel. It's easily seen by typing quickly on the soft
   keyboard with haptics enabled. Haptics will often fire at 2x or 3x
   the duration.

Change-Id: I6b294da1c53eee130f3c0ea3688a14aee496cba7
d2: Update defconfig

 * Enable FAIR_GROUP_SCHED

Change-Id: I7a6f96e2f84c58b3fa8835ceaa81e6fa8dbf2682
vidc: Migrate to ion_map_iommu() API.

Migrate video driver to use the ion_map_iommu() api,
this api provides the physical address if IOMMU is
not enabled.
If IOMMU is enabled in the system it provides the
virtual contigious address.

Change-Id: I0f6f7c50865cb3da88a0ee13425e3973037c846a
Signed-off-by: Arun Menon <menon@codeaurora.org>
vidc: Move shared memory to firmware heap

if smmu is enabled then the memory needs to be
mapped as cached for IOMMU heap, moving the
shared mmeory to firmware heap which does not
require cached mapping

Change-Id: Iac14169b1063bd2784ebf7df433614d68830e84a
Signed-off-by: Arun Menon <menon@codeaurora.org>
Merge d2spr LG8 source release.
vidc: Move metadata shared input mem to firmware heap.

Metadata shared input is used to communicate between
the video code and video driver, hence make this buffer
as uncached and allocate it from firmware heap.

Change-Id: Iabcf6fdbdf6ebcae2fef60b9163a3dfa862624f6
Signed-off-by: Arun Menon <menon@codeaurora.org>
vidc: Migrate to new ION cache ops API

New cache ops API are provided thru ION interface
migrating the in kernel cache ops to use the
new cache ops API.

Change-Id: I18502d343c40fc0f36d979898939f0e601e2f685
Signed-off-by: Arun Menon <menon@codeaurora.org>
vidc: For CP2.0 do not program the iommu.

For CP2.0 do not call the ion_map_iommu api
use the ion_phys api to get the physical address

Change-Id: I67ebc8debf064afb78133afe75aee368b6394178
Signed-off-by: Arun Menon <menon@codeaurora.org>
msm: camera: add fields to msm_stats_buf for cache
 operations.

Add a couple of fields to the msm_stats_buf structure
for cache coherence support on stats buffers from
user-space.
gpu: ion: Add support for IOMMU in CP heap

ION clients allocating from a content protection
heap (cp heap) must be able to map the memory to
an IOMMU when IOMMU are being used.

Add callbacks to CP heap to support IOMMU mapping.
msm: Disable use of the IOMMU

Originally, if CONFIG_MSM_IOMMU was enabled, clients were
expected to use the iommu for memory mapping. Currently,
it is necessary for CONFIG_MSM_IOMMU to be enabled without
having all clients ready to use the iommu. Kill support for
APIs to use the IOMMU and attaching to all domains until
clients are ready to actually use them.
gpu: ion: Lower IOMMU heap priority

Video requires the IOMMU heap to be at a lower
priority so that video can try to allocate from
its MM carveout heap first and then if video needs
more memory and the MM heap is exhausted it will
automatically fall back on IOMMU heap.

Change the priority of the IOMMU heap so video
can fall back on IOMMU heap.
msm: Add new partition for IOMMU video domain

Video hardware requires its firmware address to be lower
than the the other addresses that it accesses. In addition
secure playback requires the end of the firmware address
range to be adjacent to the main memory used by the video
hardware.

Add a new partition and rename partitions to appropriate names
to enforce the order of the memory regions.