clk: introduce the common clock framework

The common clock framework defines a common struct clk useful across
most platforms as well as an implementation of the clk api that drivers
can use safely for managing clocks.

The net result is consolidation of many different struct clk definitions
and platform-specific clock framework implementations.

This patch introduces the common struct clk, struct clk_ops and an
implementation of the well-known clock api in include/clk/clk.h.
Platforms may define their own hardware-specific clock structure and
their own clock operation callbacks, so long as it wraps an instance of
struct clk_hw.

See Documentation/clk.txt for more details.

This patch is based on the work of Jeremy Kerr, which in turn was based
on the work of Ben Herrenschmidt.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Arnd Bergman <arnd.bergmann@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Richard Zhao <richard.zhao@linaro.org>
Cc: Saravana Kannan <skannan@codeaurora.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Deepak Saxena <dsaxena@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Andrew Lunn <andrew@lunn.ch>
clk: basic clock hardware types

Many platforms support simple gateable clocks, fixed-rate clocks,
adjustable divider clocks and multi-parent multiplexer clocks.

This patch introduces basic clock types for the above-mentioned hardware
which share some common characteristics.

Based on original work by Jeremy Kerr and contribution by Jamie Iles.
Dividers and multiplexor clocks originally contributed by Richard Zhao &
Sascha Hauer.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Arnd Bergman <arnd.bergmann@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jamie Iles <jamie@jamieiles.com>
Cc: Richard Zhao <richard.zhao@linaro.org>
Cc: Saravana Kannan <skannan@codeaurora.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Deepak Saxena <dsaxena@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Andrew Lunn <andrew@lunn.ch>
OMAP: Kconfig: select COMMON_CLK

This only works for OMAP44xx with the rest of the common clk patches.
Enabling it currently breaks OMAP2 & OMAP3 compilation and obviously
multi-image boot.

Not-yet-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
omap: cm-regbits-44xx.h: add bitfield width values

The new common clk framework includes basic definitions for mux and
divider clocks.  These definitions depend on shift and width values
instead of the pre-computed masks that the OMAP clk framework has
traditionally used when accessing the register to control the mux or
divisor.

To ease this transition the masks are left intact and the width field is
simply added alongside the shift and mask data.

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: clk: convert to common struct clk

This is a pile of code to convert the OMAP4 clk framework over to the
common struct clk definition and it's supporting functions.

Note that this only works for OMAP4, and I have only tested it on Panda.
This patch is only for testing purposes and to kick off discussion of
how we want to reshape the OMAP clk framework for the new way of doing
things.

Highlight of changes in this patch:
 * convert omap's old struct clk to the new struct clk_hw_omap
 * convert all omap clock functions to use struct clk_hw_omap
 * remove duplicate clock lists and duplicate string-lookup helper
   function
 * delete plat-omap/clock.c and include/plat/clock.h
 * improve initialization of clkdev aliases (not final)
 * remove far too much duplicated clock framework infrastructure to list
   here
 * miscellaneous fixes to clock code found along the way

Not-yet-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: convert 44xx data to common struct clk

This patch is output from updated omap hw data autogeneration scripts.
Those scripts were modified to support the common struct clk
infrastructure.  It has been boot-tested on an OMAP4430 Panda.

Highlights:
 * convert some omap clock to use the basic clk types
  * root clocks use struct clk_fixed
  * m2 dividers use struct clk_divider
  * CM1/CM2 mux clocks use struct clk_mux
 * the remaining clock use struct clk_hw_omap
  * basically the old struct clk that omap's clock framework defined
 * replace struct omap_clk useage with clkdev's struct clk_lookup
 * removed omap's duplicate list of omap-specific clocks

Shortcomings:
 * breaks omap1/2/3
 * autogen scripts don't yet use a hash table to prevent duplicate struct
   clk_ops definitions which could be re-used
 * still using dummy_clk defined in omap clock code
  * this should be provided by the clk core

Not-yet-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: hwmod: convert to use common struct clk

hwmod functions implicitly deal with hardware clks and must be updated
to support the new common struct clk and accompanying functions.

Changes in this patch include adding clk_prepare/clk_unprepare to hwmod
as well as using struct clk_hw_omap instead of the old OMAP-specific
struct clk.  Direct references to struct clk (often for debugging
purposes) have been converted to use the helper functions in
include/linux/clk-provider.h

Not-yet-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap_device: do not use omap_clk_get_by_name

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap2+: pm: use clk_get_rate

Accessing members of struct clk directly is bad.  Use clk_get_rate
instead of clk->rate.

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: panda: use clk_prepare in ehci init

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
omap: dss: use clk_prepare in dss reset

Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
HACK: comment WARN_ON in _clkdm_clk_hwmod_disable

This gets noisy after converting OMAP4 over the common clock framework.
I haven't debugged this yet, so this patch is obviously a temporary
hack.

Not-ever-signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
cpufreq: OMAP driver depends CPUfreq tables

The OMAP driver depends on CPUfreq table support for creating a table
of frequencies from the OPP layer.  Ensure that it's build to avoid
link-time errors.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[khilman@ti.com: make user-selectable, but default y]
Signed-off-by: Kevin Hilman <khilman@ti.com>
cpufreq: OMAP: scale voltage along with frequency

Use the regulator framework to get the voltage regulator associated
with the MPU voltage domain and use it to scale voltage along with
frequency.

While here, CONFIG_CPU_FREQ_DEBUG doesn't exist anymore, so move
debug prints to use dev_dbg().

Special thanks to Afzal Mohammed for suggestions on more robust error
checking.

Cc: Afzal Mohammed  <afzal@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
cpufreq: OMAP: specify range for voltage scaling

Specify voltage in ranges for regulator. Range
used is tolerance specified for OPP.

This helps to achieve DVFS with a wider range of
regulators.

Cc: Kevin Hilman <khilman@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
HACK: cpufreq: omap: remove plat/clock.h

Not-signed-off-by: Mike Turquette <mturquette@ti.com>
HACK: omap: opp: add fake 400MHz OPP to bypass MPU

The following patch is only for testing __clk_reparent as part of the
new common struct clk stuff.  It may make your board burst into flames
or otherwise void various warrantees.

This patch introduces a 400MHz OPP for the MPU, which happens to
correspond to the bypass clk rate on the 4430 Panda (with 38.4MHz
SYS_CLK).  Using CPUfreq to set the MPU to this rate puts the MPU into
Low Power Bypass, which triggers the __clk_reparent code in
drivers/clk/clk.c, which migrates the dpll_mpu_ck directory (and all of
its subdirs) to the div_mpu_hs_clk dir under dpll_core_ck.

Not-signed-off-by: Mike Turquette <mturquette@ti.com>
(cherry picked from commit 43ac8bfd924078939063d04fdcc063d3510dae16)
HACK: omap: clk: add mpu_periphclk clk node

The ARM periphclk drives various peripherals for the MPU including the
TWD and local timers.  This patch creates the missing clk tree data to
represent this relationship:

 dpll_mpu_ck
      |
dpll_mpu_m2_ck (divide by 1)
      |
   mpu_clk (divide by 1)
      |
 mpu_periphclk (divide by 2)

This patch is based on Santosh Shilimkar's original version:
http://article.gmane.org/gmane.linux.ports.arm.omap/64936

Not-signed-off-by: Mike Turquette <mturquette@ti.com>
(cherry picked from commit 5c50c98c9c3748032065f32e8576cf9f8a3823b4)

Conflicts:

	arch/arm/mach-omap2/clock44xx_data.c
HACK: arm: reprogram twd based on clk notifier

As a proof-of-concept, convert the existing smp_twd code to use clk
notifiers in place of CPUfreq notifiers.  This works out nicely for
Cortex-A9 MPcore designs that scale all CPUs at the same frequency.  For
chips which can scale frequency independently this change makes less
sense. (but I don't know how they were doing it in the first place...)

The primary purpose behind this change is to test the new clk notifier
code.  If you find it useful beyond that, please let me know!

Not-signed-off-by: Mike Turquette <mturquette@linaro.org>
(cherry picked from commit b6f81ddf69b550fa2bc395aedfa9e2b75a3d9c10)

Conflicts:

	arch/arm/kernel/smp_twd.c
HACK: clock44xx_data.c: set CLK_SET_RATE_PARENT on dpll_mpu_m2_ck