bionic: timezone update to tzdata2012b and fix 32 bit alignment

The update to Android 4.0.4 updated the timezone data file to once again
not be 32 bit aligned, causing SIGBUS on ARMv5/6.

The zoneinfo.dat file is memory mapped and then read as an int array.
On some platforms this is causing alignment errors (SIGBUS) because
the records are not 32 bit aligned.

Change-Id: I1ed0e7842e6615bf0123f258a21bc40e838fd18e
Modify Android mem* routines with CodeAurora versions.

Update the memcpy, memmove, and memset routines to use the
versions from CodeAurora when specified in the bionic/Android.mk
file (actually activated in the BoardConfig.mk file under
device/<vendor>/<board>).  With this change, the mem* routines are
only used for the msm8660, while other platforms will use the
current Android mem* routines.

Future platforms can modify the makefile to use the CodeAurora-based
mem* routines as desired.  This has the benefit of making the CodeAurora-
based routines opt-in instead of opt-out.

Also, PLDSIZE and PLDOFFS can be specified in the BoardConfig.mk as well,
so other platforms with different PLD tunings can use the same code
without modifying the source file itself.

Tests with FileCycler-0.3 showed a slight 1.1% improvement with these
files on an 8660v2, based on the average of three FileCycler runs with
and without the patch.  Since the min/max values did not overlap, and
the average score showed an improvement, we can consider upstreaming these
modifications.

Change-Id: I6946076bc6a88a2a2c8667b09494e1eb31e01ee0

Conflicts:

	libc/Android.mk

Signed-off-by: Andrew Sutherland <dr3wsuth3rland@gmail.com>
Merge "bionic: timezone update to tzdata2012b and fix 32 bit alignment" into ics
libm: fix invalid result of function remquo/remquof

Currently we will get the wrong result as follows:
remquof(0x7bb33336, 0x63000000) = -671088640, 0x00000000
remquo(0xbff0000000000003, 0x3ff0000000000003) = 1, 0x8000000000000000
remquo(0x9120000000000001, 0x0000000000000005) = -1288490188, 0x0000000000000004
while the correct one should be:
remquof(0x7bb33336, 0x63000000) = 1476395008, 0x00000000
remquo(0xbff0000000000003, 0x3ff0000000000003) = -1, 0x8000000000000000
remquo(0x9120000000000001, 0x0000000000000005) = -1288490189, 0x0000000000000001

Fixed in this patch.

Change-Id: I540b348cd10a539f3b39b1753945c893c4c7ec46
Signed-off-by: Jingwei Zhang <jingwei.zhang@intel.com>
Signed-off-by: Jin Wei <wei.a.jin@intel.com>
Signed-off-by: Jack Ren <jack.ren@intel.com>
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
bionic: Fix wrong prototype of system call getresuid/getresgid

In bionic/libc/SYSCALLS.TXT, the prototypes of system call
getresuid/getresgid are incorrect.

According to man page, they should be:
    int getresuid(uid_t *ruid, uid_t *euid, uid_t *suid);
    int getresgid(gid_t *rgid, gid_t *egid, gid_t *sgid);

Change-Id: I676098868bb05a9e1fe45419b234cf397626fdad
Signed-off-by: Jin Wei <wei.a.jin@intel.com>
Signed-off-by: Jack Ren <jack.ren@intel.com>
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
Bionic: Fix wrong prototype of system call clock_nanosleep

In bionic/libc/SYSCALLS.TXT, the prototype of system call
clock_nanosleep is incorrect.

According to man page:
int clock_nanosleep(clockid_t clock_id, int flags,
                    const struct timespec *request,
                    struct timespec *remain);

Change-Id: Ic44c6db3d632293aa17998035554eacd664c2d57
Signed-off-by: Jin Wei <wei.a.jin@intel.com>
Signed-off-by: Jack Ren <jack.ren@intel.com>
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
bionic: fix NULL parameter failure in getcwd()

LTP: getcwd01 failed in LTP

Need to check getcwd parameters, otherwise it will lead to
posix test case to fail.

Change-Id: Ieb673b6dd4ca6481da81c5339dbf7ec0a463f263
Signed-off-by: Jin Wei <wei.a.jin@intel.com>
Signed-off-by: Jack Ren <jack.ren@intel.com>
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
libstdc++: Fix x86 thread-safe one-time-construction implementation.

The root of the problem is that the existing implementation is based on the
ARM C++ ABI, which mandates a different guard variable layout than the
Itanium/x86 C++ one.

This patch modifies the implementation in a way that satisfies both ABIs (and
doesn't require changing the toolchains).

Change-Id: I885e9adc7f088b9c0a78355bd752f1e6aeec9f07
Signed-off-by: Fengwei Yin <fengwei.yin@intel.com>
Signed-off-by: Jack Ren <jack.ren@intel.com>
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>