gpu: pvr: Update to DDK 1.8@794370

Change-Id: I77887fd47acf5f29cce09bc9e06378d3c8608614
(cherry picked from commit c885fad9bb18f3649d5eef1d3ba2a659946bf196)
gpu: pvr: Update to DDK 1.8@795947

Change-Id: I06b43df6f86c7199b5d75dc10716e6e6b65ee9b5
(cherry picked from commit 8462382c47d243110d3897378adb51344ae43fc3)
gpu: pvr: Update to DDK 1.8@796887.

 - Re-introduce DC refcounting fix, which makes an unrelated (and
   unfixed) problem more reproducible.
 - Fix a bug where the driver would not wait for propagation (during
   power transitions) before performing a soft reset.

Change-Id: I88d9b6d0e434bcbcfacae967b634a0699723d35b
(cherry picked from commit 5ef25e04d96c3e218e811bc5613b7bcb4f6d5d0d)
Input: evdev - Add ioctl to block suspend while event queue is not empty.

Add an ioctl, EVIOCSSUSPENDBLOCK, to enable a wakelock that will block
suspend while the event queue is not empty. This allows userspace code to
process input events while the device appears to be asleep.

The current code holds the wakelock for up 5 seconds for every input
device and client. This can prevent suspend if sensor with a high data
rate is active, even when that sensor is not capable of waking the
device once it is suspended.

Change-Id: I624d66ef30a0b3abb543685c343382b8419b42b9
Signed-off-by: Arve Hjønnevåg <arve@android.com>
(cherry picked from commit 4dc43d7079bdae572212368e1d29abea0177c932)
usb: gadget: android: Honor CONFIG_USB_GADGET_VBUS_DRAW

The maximum current draw was hard coded to 500 mA.  composite.c
has code that uses CONFIG_USB_GADGET_VBUS_DRAW to set the
bMaxPower and to set whether or not the device is self-powered if
they haven't been set.  This change removes the code in android.c
to allow composite.c to set them.

Change-Id: I9db37922e91ee86e9e5c0e14519e119e5c41ca48
Signed-off-by: Scott Anderson <saa@google.com>
(cherry picked from commit efe05323951bcf5e2a8d9e56ad04e1aae7fed043)
OMAP4: Tuna: Move TWL6040 CLK32K handling to pdata

In order to give more control to TWL6040 on the usage of
external 32kHz clock, the external CLK32KAUDIO clock provided
by TWL6030 is handled in board file.

Change-Id: Ia3d8edff55a1ecc0bfbb20ba66963a6178c4aab3
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit a9f0191150398acdfaa2b2e8161d55784bdf3cb0)
ASoC: DSP: Clear BE runtime in startup unwind

Set BE's runtime to NULL when unwinding after startup errors.

Change-Id: I7fb11dff3e623b79334345e563bb3f0da0c6823c
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit 1d363fe34dc13202bfc4a09dc65e1d25e936ed1a)
ASoC: core: Query active DAI links

Query active DAI links (dynamic and legacy frontends) in a SoC card.

Change-Id: Ieaef958833feb40499e0d67f3217f00a19ade87e
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit 077c85bb24392d2888285ca15a9e04211bed1860)
ASoC: twl6040: Remove invalid LP constraints

TWL6040 codec supports all its features and paths when using the
Low-Power PLL regardless of 44.1kHz or 48kHz configuration, so
current software constraints are removed.

Change-Id: I5aefe324dee35888f8bcc04fff0ea77d864b6ab4
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit a3fd6da674306bb589376a48144adbca4b2bae7f)
ASoC: twl6040: Use single set of PLL ids

Use a single set of TWL6040 PLL ids: TWL6040_LPPLL_ID and
TWL6040_HPPLL_ID; redundant PLL definitions are removed.

Change-Id: I9d396dafccc95054130a8f2fc691a84d2cabc759
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit 92f7002977c7906709519aabbddc1e90fe3352b2)
ASoC: core: Promote DAI link startup

Promote DAI link startup to the beginning of SoC PCM open(),
required to:

- Prepare machine-level external environment (like clocks, power
  supplies) for CPU DAIs and CODECs
- Some CODECs add hw constraints (e.g. snd_pcm_hw_constraint_list
  for twl6040, wm8523, wm8988, etc) during their startup handler
  which can be dependent on machine level settings (e.g. sysclk).
  Currently, those constraints are honored until next stream
  activity takes place as the DAI link startup occurs after
  CODEC's.

Similarly, DAI link shutdown is now moved to the last position in
SoC PCM close().

Change-Id: Iabf4256be528d1d7befa2e03bfda89a9cafe959a
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit 76926a0f669c95cc8aaa8e7bef11789797f46079)
ASoC: SDP4430: Enable/disable TWL6040 in startup/shutdown ops

SDP4430 machine driver needs to pass current sysclk configuration
before TWL6040 CODEC adds hw constraints, so sysclk needs to be
configured during DAI link startup. Otherwise the constraint will
take place till next stream is opened.

TWL6040 enable/disable can be moved to startup/shutdown, respectively.
DAI link pre/post operations are dropped as they become redundant.

Change-Id: I06abed139cc403912c73a2bb76be2f24772558bd
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit 46e4518ea66f75df7221b856b11446ac4cc9a677)
ASoC: core: Remove DAI link pre/post ops

Due to DAI link startup promotion in ASoC PCM open sequence, remove
DAI link pre/post ops sice they are now redundant.

Change-Id: I21b6b4ab9a91b351e6078b69c18b66cae1bf9014
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit 3a1d3e831c81f87a23d38d396ef4e852f121f9ea)
ASoC: twl6040: Configure PLL during hw_params

Configure TWL6040 PLL during hw_params() operation since at that
point the final PLL settings are known. Current PLL configuration
done at DAI sysclk handler is redundant and hence removed.

Change-Id: If72b6ac2145dad7f3756e19390181642021b5838
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit dfe2d235d0369b2c8cd45395596f7b2283d932f1)
ASoC: omap-mcasp: Relax S/PDIF clocks/frame constraint

The first step in the current McASP clock dividers calculation is
very strict with respect to the McASP FCLK being an integer multiple
of 128 (number of clocks required for each S/PDIF frame).

The clock divider calculation algorithm doesn't search for exact
matches, but for dividers which can produce clock drift within an
allowed PPM range. For this reason, rejecting McASP FCLK rates not
divisible by 128, reduces the space of rates the algorithm can work
on. By simply including the clocks per frame value in divider
calculation we give more flexibility to the algorithm.

Change-Id: Ic007f9fa9e776c2e5475a36b5444e2ec39c8b0bb
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit 9e95bb9ec2e1b5e19c68ee143fb317fdd92f1505)
ASoC: ABE: Use DMA at 16-bits specifically for 16-bits mono

Use sDMA configured at 16-bits specifically for 16-bits mono.
Otherwise, use 32-bits as 16-bits stereo can be packed into
a 32-bits container.

Since the DMA data size is not fixed, it doesn't make sense
to keep it as part of the static DMA parameters anymore.

Change-Id: Ib38a0d77fc8dc0935fdf3e61e291a500b32865d2
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
(cherry picked from commit b9115fb1007f7a6c925d23330c561b3526711401)
gpu: pvr: Update to DDK 1.8@808799

 - Fix a bad pointer dereference in services DC.
 - Correct GPL license text in two files.

Change-Id: Id5c4b3b2b3495007aa9a8e554f8ff8a69ebec500
(cherry picked from commit c1a243198decf09f041014e92d53e8d982fa4ee9)
gpu: pvr: Update to DDK 1.8@813213

 - Add PVRSRV_MMU_MAKE_READWRITE_ON_DEMAND feature for Crespo MapPage()
   crash bug investigation. This will write-protect the MMU pagetables
   when the SGX driver is not modifying them.

Change-Id: If2b488128ddf28536d6e706dc977f719c0193f61
(cherry picked from commit 78149c27c1a5a3571bedfd7eb4dff2798915f40a)
gpu: pvr: Update to DDK 1.8@840215

Change-Id: I5e42b74681bb5ee14235f7ed227d4fe581a2d12e
(cherry picked from commit 76e33c33552cf4cd184f55a39c425d0ccaafd557)
misc: inv_mpu: Unregister PM notifier

Unregister PM notifier on probe error or remove.  Avoids use
after free function calls observed in suspend/resume.

Change-Id: I8a2a4c523323c090c061cb7525c40c500115bfcc
Signed-off-by: Todd Poynor <toddpoynor@google.com>
(cherry picked from commit a2b0f934cc2234cd6ed3627902cc2105cb39f7f8)