video: sunxi-disp: reserve memory for FB only when MALI is enabled

The driver is expected to allocate it's own memory if this option is disabled
video: sunxi: move config options to it's own Kconfig

only relevant for 3.0 because of the mess with .config compatibility
video: sunxi-disp: Removed couple magic numbers. Should also free some memory
drivers: make dependency of axp_power/* on INPUT explicit
power: axp: turn `select` INPUT into a `depends on`
sunxi: clock: guard against missing event handler

If we kexec the kernel, we are more likely to get an IRQ handle
request without a valid handler pointer set up. Make sure the
pointer is valid before running it.

This happens just one time on kexec boot, so use likely to hint
the compiler adequately.

arch/arm/mach-msm/timer.c takes the same approach.

Signed-off-by: Emilio López <turl@linux-sunxi.org>
arm: configs: sun5i nuclear (android devkit) defconfigs

imported from A13-SDK
touchscreen: import fixes from A13-SDK
touchscreen: gt818: import driver from A13-SDK
net: wemac driver style cleanup

This commit cleans up most of the wemac driver style issues,
including but not limited to C99-style comments and incorrect
spacing between operators. scripts/checkpatch.pl -f was used
to check for errors.

There are some remaining issues, mainly too long lines, but
I feel they would be better handled on a separate patch.

Signed-off-by: Emilio López <turl@linux-sunxi.org>
sunxi: clock: fix sata problem

Based on the previous patch, i have work around a version of the patch with
the A10 User Manual v1.2.

I don't know why they have previously put PLL6 to 1.2Ghz with sourcing the
apb1 to hosc.
Seems from the document it should be simply sourced to the PLL6 when set to
1.2Ghz.

This patch propagate the clock change to all IC versions like the previous
cubieteam patch and it is far more cleaner like that.
It's following the specs from the document.
Still don't know why this mess around the IC VersC / PLL4 and why not
simply let it on and keep the whole code more straightforward.

For the cedar patch, i'm using it in my test but it's around PLL4 so it
should have no link with the sata problem i think.
I should definitvely be tested on a mele a2000 with an active mali driver
to validate it. Not my case here.

This patch is working on mine. Seems finaly more a sub PLL6 clock (PLL6M)
to be the reason of the sata problem.
sunxi: fix mali memory reserving hack

fix to work when the first mem tag has a size different than 512MB
sunxi: fix typo in refactored sw_core_fixup()

closes #84
arm: sun4i: Rework cpufreq scaling

Previously we used a block of if cases, this patch cleans up
the code and lets us use a simple table to handle this on a loop
arm: sun4i: move DVFS table to cpu-freq-table.c
arm: sun4i: use a union to hold the divs

As both the __u32 and the struct have the same size and can be
interpreted either way, use a struct to hold both. This way
we can skip the hard to read, weird casting hacks when doing
comparisons between the information on integer and struct forms.
arm: sun4i: use the union magic instead of macros
arm: sun4i: switch to PLL-based div choice

On boot, we get handed a frequency with weird divs (1008Mhz, 1-2-2-8).
As 1-2-2-8 is not on the tables, we pick the last entry incorrectly,
and this causes issues. A similar issue seems to happen on suspend.

By choosing the divs based on the PLL value, we can handle all these
cases gracefully
arm: sun4i: match old cpufreq behaviour more carefully
arm: sun4i: don't treat cpufreq table delimiter as a value

Make sure we don't consider the table delimiter as a value;
it is not one, and can cause issues (mainly division by 0)