Avoid runtime relocation of 16bit "low" mem - calculate at build instead.

Some 16bit accesses to "low" mem variables use 16bit relocations
instead of the normal 32bit relocations.  This causes build problems
if the "low" mem sections move more than 64K during relocation.

The final location of the "low" memory can be determined during the
build, so link the 16bit code with the final post-reloc location of
the "low" mem variables instead.  This eliminates the need to do these
runtime relocations on the 16bit code.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Minor - collect biostable copy code into new func copy_table().

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Minor - Replace PirOffset with PirAddr.

Technically, the PIR table could be placed at 0xf0000, which would
result in a PirOffset=0, which would confuse the code.  So, use an
absolute address (PirAddr) instead.  This also matches what the ACPI
and SMBIOS code does.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Remove SMBIOS generation on coreboot hack.

Early versions of coreboot did not create an SMBIOS table (which Linux
needs in order to use the ACPI tables), so SeaBIOS had a hack to
generate an SMBIOS table.  However, recent versions of coreboot can
generate an SMBIOS table, so there is no longer a reason to support
this hack.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Minor - remove CLEARBITS_BDA and SETBITS_BDA macros.

Remove these infrequently used macros and replace with explicit
GET_BDA/SET_BDA calls.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Minor - extend the size of the 'struct bios_data_area_s' to 256 bytes.

Make the struct 256 bytes - just for documentation purposes.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Minor - remove extra include from apm.c.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
EHCI: Add support for 64 bit capability

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
pci: runtime i/o window sizing

Update the pci i/o windows at runtime, depending on the amount memory
the machine has.  The 32bit window starts above low memory and ends at
the ioapic map address, the 64bit window is placed above high memory.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Support USB MSC devices with multiples LUNs

There are USB Mass storage devices which have more than one device.
Examples are CD Changers, or USB sticks which are partitioned in a
CDROM and Harddisk device.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
From 3aa28fcfb22036f5dc83a8f7b181f4e032f5f094 Mon Sep 17 00:00:00 2001
Subject: [PATCH 05/14] seabios: acpi: add mcfg table.

add mcfg table.
mcfg isn't populated at the moment. dev-q35 will use it later.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
From 39d1085679f889ffd194f629337cb915236c3fe3 Mon Sep 17 00:00:00 2001
Subject: [PATCH 07/14] seabios: pciinit: initialize pci_bios_mem_addr depending on chipset.

initialize pci_bios_mem_addr depending on chipset.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
From 0efcccec184165c5e77ab15762dfc7ad39c3e30e Mon Sep 17 00:00:00 2001
Subject: [PATCH 08/14] seabios: acpi, fadt: make while fadt initialization chipset specific

make while fadt initialization chipset specific.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
From 47c5cdadd4bc6e74701f6613b8dc8c46b017cd8b Mon Sep 17 00:00:00 2001
Subject: [PATCH 09/14] seabios: pci: enable SERR of normal device.

enable SERR of normal device for AER.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
fixme msg:
From 804ddf726bb2bc3f2c6211b811cb8c05fa143298 Mon Sep 17 00:00:00 2001
Subject: [PATCH 11/14] seabios: q35: add dsdt

add dsdt for q35 chipset of qemu.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>

Cc: Matthew Garrett <mjg59@srcf.ucam.org>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
-add cscope make target